The best FPGA for Forth Soft Cross

Here is the abstract for my SVFIG talk at abpit 10:20 am California time tomorrow Saturday Feb 28th.

The $15 GateMate is a great FPGA for building Forth soft cores. It will happily run at 100Mhz or more. It has 64 x 1 K word long x 20 bit wide block RAMs (BRAMs). 20 bits wide is enough for most real time control applications.
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#Forth #StackMachine #ManyCore
https://www.meetup.com/sv-fig/events/313321014/?slug=sv-fig&eventId=313321014

My new #Introduction

I am building tiny real-time #Forth co-processors for MicroPython, Circuit Python and RISC-V. On FPGA's a stack machine can be 1/2 the size of a 32 bit RISC-V soft core.

#Forth, #MicroPython #CircuitPython #Riscv #StackMachine #FPGA #Verilog
#realtime

I have created a Read The Docs site for Mecrisp Ice, which is a family of 16, 32 and 64 bit soft core Forth processors written in Verilog and based on the J1 stack machine.

https://mecrisp-ice.readthedocs.io

@Mecrisp #mecrisp #fpga #forth #j1 #stackmachine #readthedocs

@neauoire oh hecc- have you seen this??

https://www.math.ubc.ca/~cass/graphics/manual/

#PostScript #stackMachine #computationalGraphics