@[email protected]
I am pleased to announce that @icepi-zero-bot is back up and running. 
Now inside my Kubernetes cluster on more powerful hardware, so you should hopefully see some faster synthesis times and slightly nicer videos!
I think I secured it pretty well, but if someone manages to do something naughty, please don't nom-nom all my data :pleading_face:
Also, please don't break my FPGA on purporse, oki? :3
Sadly, I still need to figure out Spade support, because I couldn't find any prebuilt arm64 binaries for it :(
So, if you want to write cool SystemVerilog/VHDL/Amaranth/Veryl code, have it run on a real FPGA and output video (no need to implement DVI yourself, dw), which is then recorded and posted, check out @icepi-zero-bot's profile! The profile description contains tons of explanations and templates.
Soon, I will hopefully add Spade support back and also implement a UART interface, so you can also output text! The support for that in the bot is already there, I just need to implement a UART transmitter in VHDL and think of a cute and easy interface.
RE:
https://wafrn.jcm.re/fediverse/post/83972345-09e4-47d9-99d3-4a3885a2a198 #fedibot #FPGA #HDL #VHDL #Verilog #SystemVerilog #Amaranth #Veryl