iPostHuman

@william_cleveland
25 Followers
55 Following
1.3K Posts
Electrical/Software Engineer dabbling in Hardware FPGAs and Neuromorphic computing.
Neuromorphic Engineeringhttps://sites.google.com/d/0B_fY3ol6clHmY1h5OFRxa1NjQmM/p/0B_fY3ol6clHmalpVU1JEcGNFYlU/edit?resourcekey=0-atDquMq9_PQEWqa3EHXeTA
Engineeringhttps://www.youtube.com/channel/UCQxFumV2LMrKBMDW6dar_ZA
DiscordiPostHuman#7146
I’ve recently been working with 1024x768 LCD panels, so decided to give my display timings post a little love. 📺 https://projectf.io/posts/video-timings-vga-720p-1080p/
Video Timings: VGA, 720p, 1080p

This guide includes the timings for many standard display modes using analogue VGA, DVI, HDMI, or DisplayPort: 640x480 (VGA), 800x600 (SVGA), 1024x768 (XGA), 1280x720, and 1920x1080 (30 Hz and 60 Hz).

Project F
My Earthrise #FPGA drawing engine rendering vector letters on #ULX3S dev board connected to 1024x768 LCD panel via Pimoroni controller board (handles HDMI to FPD-Link LVDS). 🌍
35 •

Got a little carried away in inkscape on the silkscreen for this ESP32-C3 based controller board for controlling some flipdot display modules.

Using this plugin from PCM, which makes the KiCad to blender process super easy: https://github.com/30350n/pcb2blender

GitHub - 30350n/pcb2blender: KiCad to Blender 3D model workflow

KiCad to Blender 3D model workflow. Contribute to 30350n/pcb2blender development by creating an account on GitHub.

GitHub
ASK AN ENGINEER 4/16/2025 LIVE! https://youtu.be/OOfkCF5_uEs
ASK AN ENGINEER 4/16/2025 LIVE!

YouTube

I'm super happy that my latest chip Greyhound has been accepted for production! 🥳
It was designed with open source EDA tools and the IHP Open Source PDK.

Find out more here: https://github.com/mole99/greyhound-ihp

And down below ⬇️

#ASIC #FPGA #OpenSource

GitHub - mole99/greyhound-ihp: Greyhound on IHP SG13G2 0.13 μm BiCMOS process

Greyhound on IHP SG13G2 0.13 μm BiCMOS process. Contribute to mole99/greyhound-ihp development by creating an account on GitHub.

GitHub
The #riscv CPU loops over the chessboard, generating the instructions to draw each square, then starts the 2D graphics engine. The CPU can prepare drawings then continue with other things while the graphics engine renders. Here running in Verilator/SDL simulation. #FPGA

Aerium Lumen – An NVIDIA Jetson carrier board for drones and robots

Aerium System’s Lumen is a carrier board for NVIDIA Jetson SO-DIMM modules designed specifically for drones and robots with a range of low-profile connectors for I/Os for USB, UART, I2C, etc…, and three M.2 sockets for storage and wireless expansion. It targets the same applications as ARK Electronics’ NDAA-compliant Jet…
https://www.cnx-software.com/2025/04/08/aerium-lumen-an-nvidia-jetson-carrier-board-for-drones-and-robots/

Aerium Lumen - An NVIDIA Jetson carrier board for drones and robots - CNX Software

Aerium System's Lumen is a carrier board for NVIDIA Jetson SO-DIMM modules designed specifically for drones and robots with a range of low-profile

CNX Software - Embedded Systems News

TARIFF TALK! WITH LADYADA 🌍🚢 - Join Ladyada as she breaks down how recent tariff shifts impact electronic component availability and pricing, reshoring trends, and what may happen to engineering/BOM and DIY project costs. Get the inside scoop on navigating supply chain challenges while keeping your builds affordable and excellent! All this week on ASK AN ENGINEER WEDS 8PM ET on all the socials.

https://youtu.be/fVrmZe67Xcs

#tariffs

ASK an ENGINEER - featuring TARIFF TALK! 4/9/25

YouTube
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I'm super happy that my latest chip Greyhound has been accepted for production! 🥳
It was designed with open source EDA tools and the IHP Open Source PDK.

Find out more here: https://github.com/mole99/greyhound-ihp

And down below ⬇️

#ASIC #FPGA #OpenSource

🧠 So what does it do? It is part RISC-V SoC and part eFPGA.

At its heart is the CV32E40X from the OpenHW group (https://github.com/openhwgroup/cv32e40x) and an FPGA fabric generated using the FABulous framework (https://github.com/FPGA-Research/FABulous).

While the SoC is fairly basic with a QSPI Flash and PSRAM controller, 8kB of SRAM and a UART, more functionality can be implemented using the embedded FPGA.

The FPGA itself is relatively small (less than 1k LUT4) but has some nice primitives such as SRAM, MAC and dedicated register files. Greyhound's embedded FPGA can be used as a custom instruction extension, as a peripheral or as a completely standalone FPGA with 32 I/Os.

- Missing a peripheral? Simply implement it with the eFPGA.
- Want to speed up code execution? Write your own custom instruction extension.
And best of all: You can generate the FPGA bitstream using upstream yosys and nextpnr.

I'm really glad that I completed this project as part of my Master's thesis.

This wouldn't have been possible without the open source community providing IPs and frameworks to build on. I'm also grateful to IHP GmbH and the publicly funded IHP-Open-DesignLib that enabled the tapeout of this chip.

- IHP Open Source PDK: https://github.com/IHP-GmbH/IHP-Open-PDK
- IHP-Open-DesignLib: https://ihp-open-ip.readthedocs.io/en/latest/

If you have any questions about Greyhound or about open source chip design in general, feel free to ask!

GitHub - IHP-GmbH/IHP-Open-PDK: 130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design

130nm BiCMOS Open Source PDK, dedicated for Analog, Mixed Signal and RF Design - IHP-GmbH/IHP-Open-PDK

GitHub

@mole99 This is something I hope future microcontrollers do... allocate a bit of fabric to custom peripherals so that you can add your own.

Beagle PRUs, RP2040 PIOs, and "that STM32 feature that exposes a parallel bus externally whose name I forget" are halfway there :D.

@cr1901 Yeah, I do too. But if they add an eFPGA, it better be programmable with open source tools 😄
@mole99 @cr1901 reminds me of that cypress thing... PSoC
@mole99 what’s the max frequency?

@pyromuffin Depends on the conditions 😉

- nom_fast_1p32V_m40C: 85 MHz
- nom_typ_1p20V_25C: 55 MHz
- nom_slow_1p08V_125C: 34 MHz

This is for the SoC, the max frequency for the FPGA depends of course on your design.
Note that this is on a 130nm process.

@mole99 ah, thanks for the info!
@mole99 Oh this thing looks cool, and would be perfect for the project I was working on, which requires a bit of compute and a bit of fast, custom I/O. I was trying to make an FPGA-based dumb terminal, so the parts that outputs the video signal and read a PS/2 keyboard could live in the FPGA and the logic for handling the escape codes and stuff would run on the CPU.
@crzwdjk That would be cool indeed! Unfortunately, I won't be able to give away or sell Greyhound, as the tapeout is funded with public money. But as soon as I get it back (and it works 🤞), I'll definitely try something similar 😃
@mole99 this is awesome!! 🤩🙌
@gregdavill Thanks so much! Glad you like it 😊️