Major milestone in the protonpack development. The link is up and seems to not be slipping any bits!

I had to change the rate to 800 Mbps (it was 1.024 Mbps, but that put the sample clock at 256 MHz which is not allowed.

[DRC AVAL-29] IODELAY_RefClkFreq_alt: Invalid configuration. IDELAYE2 ... has an invalid REFCLK_FREQUENCY value (210.051000). Only values from 190-210, 290-310, or 390-410 are allowed.

With a 200 MHz sample clock it stopped slipping continuously, but still had random slips.

Before (at 1.024 Gbps) it had slipped in one direction at 210 MHz and the other direction at 290 MHz. This indicated that there was a clock rate problem.

Once it was running at 200MHz the slipping was random. Random slipping indicated to me there was also a signal integrity problem and the clock rate problem was fixed.

I had soldered a termination resistor on that proto-board (0201... yikes!) because #Xilinx doesn't allow internal resistors on this bank.

On a hunch I added attenuators...

After adding the attenuators I can see the K28.5 pattern locked at a stable position via the #linux subsystem on this eval kit.

It's not slipped for almost an hour now. I am celebrating by posting to mastodon.

@PaulaMaddox how do I find it?
Ha!

search for it on the web?

Click this link? https://krtkl.com/snickerdoodle/

Follow the usb cable from my computer?

Use traceroute via its wifi ip?

Look for the flashing white led?

For a board I bought for work in 2019, it seems like it will do what I need. Which is what I needed back then. An os connected to an fpga so I can write data to disk. I'm not a fan of the zynq generally. Not my style. Too integrated. But most eval kits have very few useful io...

@PaulaMaddox this board has the length of the diff pair routing in the documentation! They have fairly sane connectors. Wifi built in was probably a good call. No other peripherals is great too. I want the io for my project. And I don't intend to spin a custom fpga board.

Xilinx eval boards seem like ti and friends are paid advertisements for stupid chips. They have every io hooked to dumb level converters. Some kits have literally no io routed to headers. They are stupid expensive....

@PaulaMaddox snickerdoodle was a breath of fresh air. It is just a module. Well thought out for actual direct use in a design.

I thought it might be showing its age. But I don't see a better alternative.

I would have preferred an FPGA with a transceiver. But I got xapp523 running it seems. So it is doing the job.

I want to love it. So far pretty good. The learning curve getting it programed with help work was a bit rough. Lots of things are many versions old and not quite right...

@PaulaMaddox I took detailed notes. Many of the tutorials presumed you had done things they considered obvious. They were not.

I may end up with a long blog post about it.

But so far I am content.

@PaulaMaddox That is a fair summary.
I don't think Xilinx ever intends their eval boards to be used in an application. They expect everyone to add the FPGA directly on a custom product PCB.

I'm surprised I've never heard of Alchitry. Thanks for cluing me in. They don't have an "about" page telling there history, but from their forum it seems like they have been around since at least 2019.

..some well thought out and priced boards.

If I punt on this lvds deserializer I may consider them.

Dear @PaulaMaddox, I hope you are well! I think I'm going to punt on my lvds deserializer approach. I fear I am having what look like signal integrity issues, but could also be design/fpga timing issues. Achieving lvds deserialization is not necessary, and I don't want to spend any more time fighting it.

I see Alchitry has a new Pt board with transceivers. It also has a 400Mbit USB part on an Ft+ board.

Hmm... will I face vendor lock-in? Do you have any advice?

#Xilinx #FPGA #verilog #vhdl

@PaulaMaddox I ask about lock-in because this part does not have a processor like the Zynq I'm moving from, and therefore I'm thinking of trying to use USB rather than ethernet to get the data to the host.

I hope maybe to use the Ft or Ft+ boards that have an FTDI USB chipset with a nice high bandwidth.

It seems the reference design for these USB chipsets are provided by "alchitry labs libraries." But I have yet to find a link to the source to check the licensing, etc.

I'm not an FTDI fan.

@PaulaMaddox
Status update:
I bought and received my Pt and Ft boards. They are on my bench. I can program them! I can see the LED's light up. The Ft shows up as a USB device under linux. I can compile C code examples to talk to them, and the code runs and seems to send data to the device, but... silence... I'm even probing the FT_CLK pin and nothing...

The pin is flat-line on the scope.

I'm about to go dig in the forums for an answer.