🌘 X-pSRAM:具嵌入式異或邏輯的光子式靜態隨機存取記憶體,用於超快速儲存器內運算
➤ 光速運算:突破傳統架構的限制
https://arxiv.org/abs/2506.22707
本文提出一種新穎的光子式靜態隨機存取記憶體 (pSRAM) 位元單元,名為 X-pSRAM,它利用交叉耦合微環共振器和差動光二極體,不僅能進行電光資料儲存,還能實現超快速的儲存器內布林異或 (XOR) 運算。相較於傳統的馮·諾依曼架構,X-pSRAM 透過光速的資料傳播,大幅降低了運算延遲和能源消耗。實驗結果顯示,X-pSRAM 能夠在光域內完成 10 GHz 以上的讀取、寫入和運算操作,並透過波分複用 (WDM) 技術,實現單次操作的 n 位元 XOR 運算,進而支援大規模平行處理和更高的運算效率。該設計已在 GlobalFoundries 的 45SPCLO 製程節點上驗證成功,XOR 運算每位元消耗 13.2 fJ 的能量,為下一代光學運算技術的發展,例如密碼學、超維度運算和神經網路等應用,帶來顯著的進展。
+ 這項研究真是令人興奮!
#光子運算 #儲存器內運算 #pSRAM #異或邏輯
X-pSRAM: A Photonic SRAM with Embedded XOR Logic for Ultra-Fast In-Memory Computing

Traditional von Neumann architectures suffer from fundamental bottlenecks due to continuous data movement between memory and processing units, a challenge that worsens with technology scaling as electrical interconnect delays become more significant. These limitations impede the performance and energy efficiency required for modern data-intensive applications. In contrast, photonic in-memory computing presents a promising alternative by harnessing the advantages of light, enabling ultra-fast data propagation without length-dependent impedance, thereby significantly reducing computational latency and energy consumption. This work proposes a novel differential photonic static random access memory (pSRAM) bitcell that facilitates electro-optic data storage while enabling ultra-fast in-memory Boolean XOR computation. By employing cross-coupled microring resonators and differential photodiodes, the XOR-augmented pSRAM (X-pSRAM) bitcell achieves at least 10 GHz read, write, and compute operations entirely in the optical domain. Additionally, wavelength-division multiplexing (WDM) enables n-bit XOR computation in a single-shot operation, supporting massively parallel processing and enhanced computational efficiency. Validated on GlobalFoundries' 45SPCLO node, the X-pSRAM consumed 13.2 fJ energy per bit for XOR computation, representing a significant advancement toward next-generation optical computing with applications in cryptography, hyperdimensional computing, and neural networks.

arXiv.org

@mos_8502 personally, I'd love to see more of those developments because getting #NewOldStock or #KnownWorking #used #RAM can be a real nightmare and having something where one at worst can just chug a #PSRAM chip on, set a #DIP to limit it's size and a connector for the refresh power if needed may be a better option long-term...

Espechally with those super old systems where all the RAM modules are just on a single bus / channel and thus unless it's like #Rambus garbage one doesn't even need to terminate contacts but could in theory just make a system believe it's "fully stacked" with a single SIMM.

It'll also help people like @ActionRetro having to cannibalize machines to max some out...

Also yean, some nice #NeoRetro #8bit machines would benefit from it as well...

ESP32 3D animator [1/2]

PeerTube
ESP32 3D animator [2/2]

PeerTube

@lethalbit @Lunaphied So it is a #PSRAM on a highspeed SPI interface using modern RAM like DDR3 under the package...

Makes total sense, and to be honest I do wish for something like it that can be accessed transparently as a block device [i.e. USB flashdrive] for R/W heavy cases...

Cuz I'm convinced that'll be a better option for the #NeoFloppy when it comes to something faster than flash that isn't going to wear out faster...
https://github.com/KBtechnologies/NeoFloppy

GitHub - KBtechnologies/NeoFloppy: A new storage media format using modern interfaces.

A new storage media format using modern interfaces. - KBtechnologies/NeoFloppy

GitHub

@LunaFoxgirlVT @stman Big #FPGA's can literally emulate a lot of #ISA's like #mc68k|60 or #RISCV but I'm shure they do take some time switching between those and loading the #VHDL code.

Also I'm pretty certain that unless one were to use #PSRAM it's not possible to retain any data in #RAM between those hot reboots.

Not to mention that this assumes equal #Endian|ness...