myhdl

Python as a Hardware Description Language

PyPI
#myhdl
the PyPi MyHDL package has been updated and is in sync with the current master branch.
https://pypi.org/project/myhdl/0.11.45/
myhdl

Python as a Hardware Description Language

PyPI

Here is a conference which should include Open Source Python Libraries for Hardware Design such as MyHDL, Amarath, MyGen, and Magma. #fpga.

#python #mygen #myhdl #amarath #asic
https://wiki.f-si.org/index.php?title=FSiC2023

FSiC2023 - F-Si wiki

#MyHDL is a #HDL language in #Python for programming #FPGA. It transpile code into #Verilog or #VHDL, so it can be used with most synthesizers.

https://www.myhdl.org/docs/examples/flipflops.html
Flip-flops and Latches

La version 0.11 de #myhdl est sortie 😀
Au menu, compatibilité avec Python3.7.

#myhdl v0.11 has been released (compatibility with Python3.7).

Hi, I'm Tom. Checking out mastodon after my twitter feed got a little thin. I used it for #functionalprogramming news.

I'm into #metaprogramming for #dsp and #embedded control systems. I play with #haskell, and #racket #scheme to build DSL compilers for #synthesizer and #audio effects code. Also learning #rust.

For pay I do contracting work, currently building a networked sensor system using #erlang on #linux for control and #webapp, #c on #arm, and #myhdl on #fpga.

#introduction