Goran_MahovlicJul 26
Aleksandar suggested one more "finish" layer of color. And it seams we are getting there... #RadionaOrg #ElectricWonderland
Goran_MahovlicJul 26
Achievement unlocked! #DIY #transparent #Flex PCB that works :) Design is by Paula Bucar #ElectricWonderland #RadionaOrg #Camp
Goran_MahovlicJul 25
Bringing DIY PCB in #RadionaOrg #ElectricWonderland #Camp to a next level!
Goran_MahovlicMar 8
Many thanks to #BSidesZagreb for having #RadionaORG #retro setup, and suggesting us to create #CTF #badge! Organization and #conference was perfect! Thanks on everything!
FluxFeb 9, 2024

It's #FPGAFriday already! This week, I've got some 1280x720 ULX3S graphics designs for you. Please give them a try and let me know how you get on. This is my first attempt at graphics on ECP5. #FPGA #RadionaOrg

Find the Verilog source & Makefile in git: https://github.com/projf/projf-explore/tree/main/graphics/fpga-graphics

projf-explore/graphics/fpga-graphics at main · projf/projf-explore

Project F brings FPGAs to life with exciting open-source designs you can build on. - projf/projf-explore

GitHub
FluxJan 26, 2024
I bet you have an #FPGA board in a drawer somewhere. Why not show it some love for #FPGAFriday? I'm dusting off my #RadionaOrg ULX3S and porting a graphics design with the @yosyshq open-source toolchain.
Goran_MahovlicNov 25, 2023
Hello from BB3-CM4! In collaboration with @envox && #RadionaORG && #Intergalaktik
and with @NGIZero funding we have working prototype of @Raspberry_Pi #CM4 compatible #BenchBox3 that can also hold #ULX4M FPGA board or other compatible board. #STM32 board is also in progress!
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FluxFeb 9, 2024

It's #FPGAFriday already! This week, I've got some 1280x720 ULX3S graphics designs for you. Please give them a try and let me know how you get on. This is my first attempt at graphics on ECP5. #FPGA #RadionaOrg

Find the Verilog source & Makefile in git: https://github.com/projf/projf-explore/tree/main/graphics/fpga-graphics

Show threadFluxFeb 9, 2024

I've created two clock modules for the ULX3S. 25.2 MHz for 640x480 60Hz and 74 MHz for 1280x720 59.8 Hz.

I didn't manage to create a 74.25 MHz clock for 1280x720 60 Hz, but 74 MHz is still in spec 74.25±0.5%.

Clock modules source: https://github.com/projf/projf-explore/tree/main/lib/clock/ecp5

projf-explore/lib/clock/ecp5 at main · projf/projf-explore

Project F brings FPGAs to life with exciting open-source designs you can build on. - projf/projf-explore

GitHub
Show threadmole99Feb 9, 2024

@WillFlux Works fine for me! 🎉️

Maybe you could mention to install the udev rules from here: https://github.com/emard/ulx3s-bin
And the `--write-flash` option for OpenFPGALoader. I always have to carry the FPGA board to the monitor ;)

GitHub - emard/ulx3s-bin: Quickstart binaries for flashing ULX3S to factory-default state

Quickstart binaries for flashing ULX3S to factory-default state - GitHub - emard/ulx3s-bin: Quickstart binaries for flashing ULX3S to factory-default state

GitHub
Show threadFluxFeb 9, 2024

@mole99 thank you for testing! 🙏

And for the excellent suggestions. I will add write-flash to the README. I’m planning to mention the udev rules in a forthcoming post on OSS CAD Suite.

Show threadmole99Feb 9, 2024
@WillFlux You're welcome. Thank you for your great tutorials! They helped me a lot when I first got started with FPGAs 😃️ (and they still do!)