It's #FPGAFriday already! This week, I've got some 1280x720 ULX3S graphics designs for you. Please give them a try and let me know how you get on. This is my first attempt at graphics on ECP5. #FPGA #RadionaOrg

Find the Verilog source & Makefile in git: https://github.com/projf/projf-explore/tree/main/graphics/fpga-graphics

projf-explore/graphics/fpga-graphics at main ยท projf/projf-explore

Project F brings FPGAs to life with exciting open-source designs you can build on. - projf/projf-explore

GitHub

@WillFlux Works fine for me! ๐ŸŽ‰๏ธ

Maybe you could mention to install the udev rules from here: https://github.com/emard/ulx3s-bin
And the `--write-flash` option for OpenFPGALoader. I always have to carry the FPGA board to the monitor ;)

GitHub - emard/ulx3s-bin: Quickstart binaries for flashing ULX3S to factory-default state

Quickstart binaries for flashing ULX3S to factory-default state - GitHub - emard/ulx3s-bin: Quickstart binaries for flashing ULX3S to factory-default state

GitHub

@mole99 thank you for testing! ๐Ÿ™

And for the excellent suggestions. I will add write-flash to the README. Iโ€™m planning to mention the udev rules in a forthcoming post on OSS CAD Suite.

@WillFlux You're welcome. Thank you for your great tutorials! They helped me a lot when I first got started with FPGAs ๐Ÿ˜ƒ๏ธ (and they still do!)