Today IBM is unveiling their nanostack transistor architecture. Meant to drive chip construction in the sub-1nm era in the 2030s, nanostack aims for building better and smaller chips by building them taller via wafer stacking#7A #CFET #Fab #GAAFET #IBM #Nanostack
IBM Outlines Sub-1nm Nanostack Transistor Technology: Building the Next Gen By Going Up

3D-Stacked CMOS Takes Moore's Law to New Heights
https://spectrum.ieee.org/3d-cmos
#ycombinator #cmos #nanoribbon #moore_slaw #buried_power_rails #cfet #intel #nanosheet_transistors