Mastodawn

Today IBM is unveiling their nanostack transistor architecture. Meant to drive chip construction in the sub-1nm era in the 2030s, nanostack aims for building better and smaller chips by building them taller via wafer stacking#7A #CFET #Fab #GAAFET #IBM #Nanostack
IBM Outlines Sub-1nm Nanostack Transistor Technology: Building the Next Gen By Going Up

IBM Outlines Sub-1nm Nanostack Transistor Technology: Building the Next Gen By Going Up

Today IBM is unveiling their nanostack transistor architecture. Meant to drive chip construction in the sub-1nm era in the 2030s, nanostack aims for building better and smaller chips by building them taller via wafer stacking

ServeTheHome

Frédéric Jacobs Oct 19, 2025

Beyond 2nm #GAAFET Transistors, "gate stack" engineering, a core technology for two-dimensional transistors, which are attracting attention as next-generation semiconductor devices.

The biggest obstacle to commercializing 2D transistors is the implementation of high-quality gate stacks. This research presents a standard blueprint to overcome this challenge.

Also, ferroelectric-embedded gate stacks for memory :)

https://www.nature.com/articles/s41928-025-01448-5

GOMOOT

Jun 1, 2024

💡 AMD collaborerà con Samsung per la produzione di chip a 3nm GAAFET

https://gomoot.com/amd-collaborera-con-samsung-per-la-produzione-di-chip-a-3nm-gaafet

#AI #amd #blog #cpu #dpu #GAAFET #gpu #news #picks #Samsung #tech #tecnologia #TMSC

AMD sceglie Samsung per la produzione di chip a 3nm GAAFET

AMD sceglie Samsung per la produzione di chip a 3nm: la partnership mira a diversificare la catena di approvvigionamento e aumentare la capacità produttiva

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