#Question
#DearInternet
#DearFediverse
#DearLazyWeb

(1) Does the Apple MacBook Neo support virtualisation (Hypervisor)?

#HyperVisor #QEMU #VirtualMachine #Virtualisation

(2) Can you do macOS/iOS software development on an Apple MacBook Neo?

#Swift #ObjectiveC

(3) Can you do software development on an Apple MacBook Neo?

#ObjectPascal #Delphi #Ada #Lisp #Scheme #Racket #SmallTalkLang #SelfLang

#AppleMacBookNeo #Apple #MacBookNeo

THE BIGLIEST EMPIRE, WOW

https://piefed.social/c/historymemes/p/1881145/the-bigliest-empire-wow

The special discount for the DynaPDF 5 Introduction ends 15th March 2026.

If you need a new license, an update or an upgrade to a higher tier, please use it.

For #FileMaker, #Xojo, C/C++, C#, #Delphi, #Lazarus, #PHP, Visual Basic, #VBA, and VB .Net.

https://www.mbsplugins.de/archive/2026-02-19/DynaPDF_5_Introduction/monkeybreadsoftware_blog_archive

Durante l'ultima live su #Twitch ho provato a costruire un plugin che genera #UI con l'#AI al volo, direttamente nell'IDE di #Delphi! 🤩

In questo breve video trovate i momenti diciamo più… "creativi" (o cretini?) di questo esperimento. 😁

Il replay completo è disponibile qui su YouTube!
👉 https://www.youtube.com/watch?v=47otIo7VUk4

Faccio live ogni settimana (o quasi) su Twitch: segui il mio canale e vieni in chat!
https://www.twitch.tv/compilaquindiva

E nella live della prossima settimana, che si fa? Aiutatemi! 🫢

The irony: the entire RISC-V base ISA (RV64GC) is beautifully RISC: simple opcodes, fixed 32-bit instructions (+ compressed), load/store architecture, no flags, no implicit state. Then RVV comes along and throws all those principles out the window: global implicit state, microcode-like behavior, variable semantics of the same instruction.

Because vsetvli changes the semantics of all subsequent V-instructions based on the current VLEN configuration. For a JIT compiler in an Emulator and for an Emulator in general, this means having to continuously track the vtype state and react to any changes, a fundamental contradiction to the principle of statically analyzable instructions. It feels like the RISC-V Foundation sacrificed the simplicity and elegance of the RISC principle to create a powerful but extremely complex "super-SIMD" that is difficult to efficiently map in a JIT. A more traditional SIMD extension with fixed vector widths and clearly defined instruction semantics would have been much more JIT-friendly. The upcoming P extension does go in that direction, but it is primarily targeted at embedded and low-power applications rather than high-performance computing.

#riscv #riscv64 #emulation #pasriscv #object_pascal #delphi #free_pascal