PiEmbSysTechJun 6

Unlocking the Power of VLSI in Automotive and Embedded Systems

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#VLSIDesign #EmbeddedSystems #AutomotiveElectronics #ChipDesign #SystemOnChip #CMOSTechnology #SemiconductorEngineering #ECUDevelopment #ADAS #BMS #VehicleNetworking #ASICDesign #RTLDesign #MicrocontrollerDesign #HardwareArchitecture #AutomotiveSoftware #LowLevelProgramming

HGPU groupMar 30

Analyzing Modern NVIDIA GPU cores

#HardwareArchitecture

https://hgpu.org/?p=29837

Analyzing Modern NVIDIA GPU cores

GPUs are the most popular platform for accelerating HPC workloads, such as artificial intelligence and science simulations. However, most microarchitectural research in academia relies on GPU core …

hgpu.org
Show threadStephen HoffmanJan 28

@jfmezei One of the reasons VAX is comparatively slow involves the condition codes, including the carry bit.

~Every VAX instruction is a test instruction, if you want it to be.

But if you break that part of the VAX design to make the architecture go faster, you might as well also break, err, alter some other VAX architectural design constraints. After some other work including Prism, that architectural replacement was Alpha.

As assemblers go, VAX is quite nice.

But assembler as a choice for app development started to fade around the era of the 3GL vs Assembler debates; the early to mid 1980s.

Section 8.4 has details of the VAX condition codes:

https://docs.vmssoftware.com/docs/vsi-openvms-vax-macro-and-instruction-set-reference-manual.pdf#page156

#vax #hardwarearchitecture #retrocomputing

HGPU groupJan 27

Good things come in small packages: Should we adopt Lite-GPUs in AI infrastructure?

#AI #HardwareArchitecture

https://hgpu.org/?p=29704

Good things come in small packages: Should we adopt Lite-GPUs in AI infrastructure?

To match the blooming demand of generative AI workloads, GPU designers have so far been trying to pack more and more compute and memory into single complex and expensive packages. However, there is…

hgpu.org
HGPU groupDec 29

A survey on FPGA-based accelerator for ML models

#FPGA #Survey #MachineLearning #ML #HardwareArchitecture

https://hgpu.org/?p=29622

A survey on FPGA-based accelerator for ML models

This paper thoroughly surveys machine learning (ML) algorithms acceleration in hardware accelerators, focusing on Field-Programmable Gate Arrays (FPGAs). It reviews 287 out of 1138 papers from the …

hgpu.org
HGPU groupDec 15, 2024

Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems

#Performance #SSD #GPU #HardwareArchitecture

https://hgpu.org/?p=29597

Towards Performance-Aware Allocation for Accelerated Machine Learning on GPU-SSD Systems

The exponential growth of data-intensive machine learning workloads has exposed significant limitations in conventional GPU-accelerated systems, especially when processing datasets exceeding GPU DR…

hgpu.org
HGPU groupDec 1, 2024

Hardware Accelerators for Artificial Intelligence

#AI #HardwareArchitecture #Performance #Survey

https://hgpu.org/?p=29568

Hardware Accelerators for Artificial Intelligence

In this chapter, we aim to explore an in-depth exploration of the specialized hardware accelerators designed to enhance Artificial Intelligence (AI) applications, focusing on their necessity, devel…

hgpu.org