RT from ACL Digital (@ACL_Digital)

RISC-V is transforming the chip design environment rapidly. Join our expert, Ramesh T.P, and take a deep dive into the world of RISC-V.
Register here: https://zoom.us/webinar/register/WN_2ub5MdTfQHiXcnJ32bF56w#/registration
#RISCV #RTLDesign #Webinar #SiliconEngineering #SemiconductorEngineering #ChipDesign #TechWebinar

Original tweet: https://twitter.com/ACL_Digital/status/1754558098394820686

Welcome! You are invited to join a webinar: Navigating the RISC-V Ecosystem . After registering, you will receive a confirmation email about joining the webinar.

RISC-V is transforming the chip design environment rapidly. But navigating this dynamic ecosystem can be daunting. Join us for an insightful webinar on "Navigating the RISC-V Ecosystem" – a deep dive into the open-source standard transforming silicon production. Key Highlights: - Recent trends in RISC-V ISA/processor cores - Developments in RISC-V tools for software and hardware development - Survey of RISC-V ecosystem organizations and focus areas - Overview of commercial hardware/IP providers Register today to save your spot!

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Quite a long list this time spanning sophisticated semiconductor properties (generating electricity from heat), some "cyberspace" legal arguments, an interesting attack against automatic speaker verification, a design "fixing" speculative execution¹, a family of low-latency ciphers, randomness in Cisco ASA (yes!), anonymising stories with privacy guarantees (thought-provoking for sure), ChatGPT fun, malicious IPFS, and a little something about the perception of privacy (also thought-provoking).

Here's the shortlist:

* "Semiconductor Thermal and Electrical Properties Decoupled by Localized Phonon Resonances"
* "On-chip wavelength division multiplexing filters using extremely efficient gate-driven silicon microring resonator array"
* "Space Cybersecurity Norms"
* "Malafide: a novel adversarial convolutive noise attack against deepfake and spoofing detection systems"
* "SafeBet: Secure, Simple, and Fast Speculative Execution"
* "Introducing two Low-Latency Cipher Families: Sonic and SuperSonic"
* "Randomness of random in Cisco ASA"
* "What If Alice Wants Her Story Told?"
* "Check Me If You Can: Detecting ChatGPT-Generated Academic Writing using CheckGPT"
* "What's inside a node? Malicious IPFS nodes under the magnifying glass"
* ""My sex-related data is more sensitive than my financial data and I want the same level of security and privacy": User Risk Perceptions and Protective Actions in Female-oriented Technologies"

#Photonics #SemiconductorEngineering #Cybersecurity #AdversarialConvolutiveAttacks #SpeculativeExecution #LowLatencyCiphers #Randomness #Privacy #Anonymity #ChatGPT #IPFS

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¹ to me it is just memory tagging "done wrong" but I am putting it forward just in case it is my unconscious bias talking.

Today we have two papers from #arXiv and one blog post which is a departure from my usual standard but I feel is interesting for the questions it raises.

* "No One-Size-Fits-All Approach To RISC-V Processor Optimization" - a Semiconductor Engineering "Systems & Design" blog post,

* "ACAI: Extending Arm Confidential Computing Architecture Protection from CPUs to Accelerators"

* "To Signal or Not to Signal? Layering Traffic Analysis Resistance on Secure Instant Messaging" - an update to a 2022 paper which I had thought interesting (deals with metadata information leakage)

#arXiv #ResearchPapers #SemiconductorEngineering #RISCV #Arm #Signal #Privacy #Metadata #ConfidentialComputing #TEE #TrustedExecutionEnvironment