🚨 **Last Opportunity to Register**

The **Faculty Development Program on VLSI Design using eSim & Open PDKs** begins soon.

πŸ“… 26–29 June 2026

πŸŽ“ Organised by FOSSEE, IIT Bombay

πŸ”— Register: https://esim.fossee.in/fdp-2026

Please boost and share with faculty members and researchers interested in VLSI and semiconductor design.

#FOSSEE #IITBombay #eSim #VLSI #EDA #OpenPDK #VLSIDesign #ChipDesign #OpenSourceEDA #FacultyDevelopmentProgram #EngineeringEducation #Microelectronics #SemiconductorEducation

RT from Maven Silicon (@mavensilicon)

"Is your career at RISK without RISC-V?"

Read ​the ​latest article​ by our Founder & CEO, Mr. Sivakumar P R, published on D&R to gain insight on the same - https://www.design-reuse.com/articles/53118/is-your-career-at-risk-without-risc-v.html
#semiconductor #vlsi #vlsidesign #riscv #vlsijobs

Original tweet : https://twitter.com/MavenSilicon/status/1599748537839136769

Is your career at RISK without RISC-V?

I am delighted to share my technical insights into RISC-V in this article to inspire and prepare the next generation of chip designers for the future of the open era of computing. If you understand how we build complex electronic devices like desktops and smartphones using processors, you would be more interested in learning and exploring the Instruction Set Architectures.

Design And Reuse