"Modern DRAM is based on a brilliant design from IBM.

But, we're still paying for a latency penalty that's existed since the 60s!

In this video, I'm introducing my personal research project (Tailslayer) that immensely reduces p99.99 latency on traditional RAM!

By implementing a hedged read strategy taking advantage of (undocumented!) channel scrambling offsets, I've gotten as much as 15x reductions in tail latency.

The technique works across Intel, AMD, Graviton, DDR4, DDR5, x86, ARM, you name it.

Check out the C++ lib I wrote, watch the video, and try it yourself!"

By @lauriewired who is frankly amazing 😄🖖

https://youtu.be/KKbgulTp3FE

#DRAM #Latency #TailSlayer

I hate to share links to a google service, but this is the best presentation of technical research I've ever seen

https://www.youtube.com/watch?v=KKbgulTp3FE

#tailslayer

OMG This of hands down the best yt video I have ever watched!

Whether you're chasing that 99.99 percentile 400ns latency spike (which I am!) or just curious about how your computer's memory actually works (also me!) this was both super technical and ludicrously entertaining.

https://youtu.be/KKbgulTp3FE

#tailslayer

#Tailslayer “a C++ library that reduces tail latency in #RAM reads caused by #DRAM refresh stalls.” — LaurieWired

#CompSci / #hardware / #TailLatency / #latency / #LaurieWired <https://github.com/LaurieWired/tailslayer> / <https://youtube.com/watch?v=KKbgulTp3FE>

Everyone: WAAAA AIS
>Girl nerd in her home: Hmm, the latency are too slow (in nanoseconds), can I make it faster?
>Look up RAM Architecture
>Look up a RAM attack technique
>channels racing?
>more channels racing?
>profit
>name is tailslayer btw

note: I might have misinterpret something, im not a memory expert yet =w=

#computerscience #ram #tailslayer #research #computerresearch #lauriewired

https://www.youtube.com/watch?v=KKbgulTp3FE

github repo: https://github.com/LaurieWired/tailslayer