Hacker NewsJan 25
Two Weeks Until Tapeout
https://essenceia.github.io/projects/two_weeks_until_tapeout/
#ycombinator #asic #gf180 #180nm #rtl #verilog #JTAG #DFT #systolic_array #arithmetic
Two weeks until tapeout

Chronicles of a bad idea. Or how I designed a systolic array with in-silicon debug infrastructure from scratch in under two weeks, and taped it out on Global Foundry 180 nm though a Tiny Tapeout experimental shuttle.

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