🇮🇹 Just back from an intensive Erasmus+ Staff Mobility at the Università della Calabria in Cosenza, Italy.
Incredible opportunity to reunite with Prof. Nino Russo – nearly 5 years after my PhD student visit in 2021!
The results? We’ve already outlined four new joint research papers that will launch soon. Major step forward in our Polish-Italian scientific collaboration. 🚀
#ErasmusPlus #StaffMobility #UniCal #ComputationalChemistry #DFT #PDT #WroclawMedicalUniversity
Зачем нужен Design for Testability (DFT) и как его реализуют в FPGA
Привет, Хабр! Меня зовут Антон Осетров, я разрабатываю СнК в компании
https://habr.com/ru/companies/yadro/articles/1006004/
#dft #design_for_manufacturing #rtl #fpga #fpga+soc #verilog #testing #испытания #design_for_testability #atpg
(1/2)
I found a nice improvement to the Constant-Q Sliding DFT¹.
Using single precision calculation (32-bit float) generates some remanent noise because of the recursive nature of the algorithm: a running sum combined with complex rotations.
Replacing the complex multiply in eq. 3 for the twiddle factors (outer exponential) with the Martin Vicanek’s quadrature oscillator² helps a lot in the low frequencies. About 30 dB of improvement here, almost no extra CPU cost.
¹ A transform turning a PCM signal into a frequency spectrum. https://www.dafx.de/paper-archive/details.php?id=QMFQa1rIAM7mwu9tMIZAlg