Ludovic :Firefox: :FreeBSD:"ps. m88k has been the most worthwhile example, since some insane parts
of that architecture permits Miod to find a MI bug weekly."
I just love that quote.
Miod VallatNever draw that many stack frames on paper next to assembly code since, well, working on the gcc 3 backend about 15 years ago...
EAT DIRT, GCC!
Ahem.
I mean "yay! finally solved that corner-case bug which had been worrying me over the last few days".
lopta@NanoRaptor I was about to ask about #m88k Macs but then I remembered that PowerPC got its bus interface from there. Other features too?
Adrián Pérez
@brynet @florian I might have stumbled upon a dual SMP dmesg while searching around. It was precisely because I saw the #OpenBSD support for #m88k that I started looking a bit into the architecture. Too bad it's hard to source a machine! Maybe somebody with VHDL/FPGA-fu could have some fun making a CPU implementation 😎
The timing diagrams in the #m88k manuals are a lovely thing as well, and are accompanied of step–by–step explanations, too! One can only wish that the explanations of the lessons back in the university were this good.
In the #m88k the “r0” register is read only and always gives a zero value. Nothing too special: other RISC families do the same. Writing to “r0” is allowed and does not change the register but it may have side effects depending on the instruction used.
Now wait for it: using “ld.b r0, r1[0]” actually issues a load for the byte at the address stored in “r1” as side effect but it's not getting stored. This effectively acts as a cache preload hint instruction without needing a different opcode! 😎
The #m88k manual has this beautiful table showing which pairs of instructions can be issued to execution units simultaneously in the same clock cycle 
The MC88110 could do double instruction issue in 1991. Meanwhile for Intel it took until 1993 with the Pentium to get there. Reading the old Motorola manuals is making me a bit nostalgic for those times when there were wild experimentation going on and not everything was either x86 or ARM.
The way of jumping into supervisor mode from userspace in the #m88k is also interesting: instead of having a single entry point (e.g. for system calls) and using a register to store the code of the system call to use, there is a vector of trap handlers, and an immediate operand is encoded in instructions that trap to select an index into the vector.
There are a number of entries in the trap vector which are exclusive for supervisor mode (e.g. for hardware interrupts) and the rest for user traps