David Chisnall (*Now with 50% more sarcasm!*)It's a good year for awards for #CHERI papers! After the test-of-time award for the 2015 paper, we've also received a Best Paper award for the paper describing running a very large amount of memory-safe code on a CHERI system!
LoMon #Chéri @GazouilleurFou dit que chercher à lutter contre Gougleu c'est s'attaquer à la Tour Eiffel avec un cure-dent. Je suis assez d'accord ! 😜🦊
Ed MasteVery exciting to see the plans for upstreaming #CHERI support in Clang/LLVM https://discourse.llvm.org/t/rfc-upstream-target-support-for-cheri-enabled-architectures/87623
[RFC] Upstream target support for CHERI-enabled architectures
Authors: Owen Anderson, Jessica Clarke, Alex Richardson, David Chisnall This RFC is a proposal to gain consensus on upstreaming target support for the CHERI-enabled architectures to the LLVM project. This is an “entire project” RFC, as CHERI support touches many parts of the toolchain: primarily LLVM, Clang, and LLD, with other components such as runtime libraries or LLDB potentially being touched as well. Upstreaming many of these sub-components of CHERI support will likely merit their own ar...
[RFC] Upstream target support for CHERI-enabled architectures
Authors: Owen Anderson, Jessica Clarke, Alex Richardson, David Chisnall This RFC is a proposal to gain consensus on upstreaming target support for the CHERI-enabled architectures to the LLVM project. This is an “entire project” RFC, as CHERI support touches many parts of the toolchain: primarily LLVM, Clang, and LLD, with other components such as runtime libraries or LLDB potentially being touched as well. Upstreaming many of these sub-components of CHERI support will likely merit their own ar...
CHERI AllianceOne of our founding directors, Mike Eftimakis, sat down with Akshaya Asokan from Information Security Media Group (ISMG) to explore how CHERI is helping tackle one of cybersecurity’s biggest challenges: memory safety.
CHERI (Capability Hardware Enhanced RISC Instructions) is a hardware-based approach to security, designed to prevent around 70% of today’s common vulnerabilities. Backed by industry leaders and the UK government, we're working to ensure global adoption across the electronics supply chain.
Watch the interview to learn more about:
💠 How CHERI addresses memory safety issues
💠 Common hardware supply chain vulnerabilities
💠 Progress on adoption by chipmakers
💠 Scalability challenges associated with CHERI
🎥 Watch the full interview: https://www.bankinfosecurity.com/uks-cheri-alliance-expands-to-global-hardware-supply-chain-a-28942
#CHERI #CyberSecurity #HardwareSecurity #MemorySafety #SecurityByDesign #InfoSec
@cheri_alliance Great to see Manchester joining. And also glad that they could make it before they hosted the next #CHERI conference!
tigerhiddenadamCompiled and tested cheriot-clang21 preview against Sail tonight.
Very nice.
Put a smile on my face.
Owen is a legend.
The CHERI Alliance is all about bringing the computing world together to adopt CHERI security technology.
We’re a mix of industry partners, open-source contributors, researchers, and governments, all working to make CHERI more accessible and widely used.
Check out who’s already on board: https://cheri-alliance.org/member/
We’ve got active working groups tackling everything from software porting to system integration and standards - all helping the community adopt and build with CHERI more effectively. Take a look: https://cheri-alliance.org/who-we-are/working-groups/
Curious? Keen to get involved? Here’s how to join us: https://cheri-alliance.org/memberships/
Excellent news yesterday, the #CHERIoT RTOS paper was accepted at SOSP!
Huge thanks to @hle, who led on rewriting the rejected submission and made numerous improvements to the implementation.
We now have CHERIoT papers in top architecture and OS venues, I guess security and networking are the next places to aim for!