vectorized prefix ~sum~ function composition
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| GitHub | https://github.com/bal-e |
| Website | https://bal-e.org |
| Pronouns | she/her |
Arav K.
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- 120 Posts
Doomed to eternally want nice things.
AVX2 tip! `PANDN(x, PCMPEQB(y, 0))` where the MSB of `y` is always unset can be transformed into `PSIGN(y, x)`. If you want to mask some elements `x` based on whether an input `y` is non-zero, and the MSB of `y` is always unset, you can multiply `x` by the sign of `y` (which will be 0 or 1) in 1 cycle using `PSIGN`. I think this is actually a pretty common pattern, but compilers can't really see it because of the MSB check.
I'm now a part of the beetbox organization and an official contributor to @beets !
https://github.com/orgs/beetbox/people
https://github.com/beetbox/beets/blob/master/docs/team.rst
https://github.com/orgs/beetbox/people
https://github.com/beetbox/beets/blob/master/docs/team.rst
I miss sudo +offensive ... time to set up Gentoo again
All I wanted was an integer parameter I could use in a `const` expression...
why are unconstrained generic const parameters making me sad
can I not have nice things
Version 0.2.0 of `npsimd` is now published, with a new low-level API that supports runtime feature detection (currently only SSE2 is implemented). I'm going to slowly migrate all the existing functionality over to it, and then work on a better higher-level API. See <https://docs.rs/npsimd>!
accidentally fork-bombed the Rust compiler with weird macro recursion, oops
Note that this library can only be used on Nightly Rust -- it basically copies some of the internal SIMD definitions in `core::arch`, which are supposed to be exposed to the standard library only. It's an unfortunate limitation, but it allows us to directly access some intrinsics that aren't even available in `core::arch` yet, e.g. `_mm_abs_epi64()`.
My personal use case is for Intel x86-64's SSE, AVX, and AVX-512 instructions, for integer manipulation. It's the area I'm most experienced with, but I'm happy to get help for other platforms, e.g. ARM SVE. I do plan to explore RISC-V V later myself -- I really like it but it requires a completely different API to Intel SIMD.