today I learned that we (as a civilization) now can put 16 silicon flash dice into a single 700µm microSD card on a commercial scale https://www.ose.com.tw/en/ic-services/memory-product-package/microsdsd

if you think that the precariously balanced tower of flash above is an inaccurate representation of what's going on, i can reassure you that
(a) this is exactly how it looks like, and
(b) SK Hynix is up to 24 layers already (not sure in what application)

https://news.skhynix.com/semiconductor-back-end-process-episode-4-packages-part-2/

@whitequark also each flash die has several hundred layers of stacked bit cells
@azonenberg yep! Samsung got up to 400 layers last year
@whitequark @azonenberg No fucking way, how are those even economical to manufacture? 
@0xC01DC0FFEE @whitequark V-NAND is crazy. Basically deposit alternating layers of a couple of materials then drill through the whole stack and you get a vertical abacus-shaped string of hundreds of flash bits
@whitequark @0xC01DC0FFEE the transistor channel is vertical polysilicon deposited into a hole that looks kinda like a dram capacitor, except it's ringed by ONO charge trap layers then more poly for the wordlines IIRC
3D NAND | Applied Materials

3D NAND, also known as vertical NAND (V-NAND), is a type of non-volatile flash memory, where the cells are stacked vertically to increase storage density.

Applied Materials
3D NAND: Making a Vertical String - The Memory Guy Blog

(The following is an update of a post that originally ran on 1 November 2013. It was republished in 2024 as a part of a series to honor the 3D NAND inventors who have received the 2024 FMS Lifetime Achievement Award.) Let’s look at how one form of 3D NAND is manufactured. For this post

The Memory Guy Blog - Jim Handy, Objective Analysis, on Semiconductor Memories