I'm happy to release the next installment of 🏝️ Isle #FPGA computer with a #RISCV CPU design from @BrunoLevy01.
This chapter demonstrates how to interface a CPU with your own hardware and how to write bare-metal RISC-V assembly code for it.
I'm happy to release the next installment of 🏝️ Isle #FPGA computer with a #RISCV CPU design from @BrunoLevy01.
This chapter demonstrates how to interface a CPU with your own hardware and how to write bare-metal RISC-V assembly code for it.
You can find the open-source designs and instructions for 🏝️ Isle FPGA computer at: https://github.com/projf/isle
You can run Isle on Linux/Mac/Windows under simulation, and it's really easy to set up.
Plus, there's board support #ULX3S, @machdyne Lakritz, and Digilent Nexys Video.
@BrunoLevy01 @Mecrisp Thank you! There's a long way to go, but your CPU is a big help. 🙏
In the next chapter I plan to use FemtoRV with M and C extensions.
Sorry I didn’t mention mecrisp on Mastodon, but I did in the blog post: https://projectf.io/isle/riscv-cpu.html
@jtruk thank you! ☺️
They're definitely a work in progress, but I strongly believe it's the documentation (and future videos) that will make this project work or not. Plus I want to share the learning and designs so people can use them in their own projects.