Decided to play with this device a bit more.
Characterized my inductors, made another inductor with only two turns instead of three. I don't have an LCR meter so uhh used the 1kHz calibration output on my scope to ring a little parallel-LC resonator circuit and measured the frequency.
To my great surprise, I also found that the device performs much better at ~12v than the ~20 that other folks have run previously.
Still not sure what exactly is causing the ~100mhz ringing.
update on the ~100mhz ringing:
thought about it some more, and did some more poking at LTspice. While the previously highlighted axial resistor might well be inductive, it's hardly conducting any current. Not nearly enough to produce that kind of oscillation.
My new suspect: the parasitics on the mosfet itself (plus a bit of pcb trace) are acting as resonant LC circuit. Turns out this is totally a known phenomenon if external gate resistance is too low. I had been thinking of my 2Ω2 gate resistor as part of a phase-shift RC circuit (that's how it was presented in previous work I'm referencing), but it also is dampening the parasitic LC resonance.
Here's a video of a lovely gentleman going in-depth on mosfet gate ringing and necessary resistor values
should be able to test this tomorrow.
and I'm... having this feeling like I've rapidly departed from "dabbling at some electronics" and entering territory of "this legitimately qualifies as electrical engineering".
it's a funny feeling.
goddammit blew up my last FET.
What I'm tempted to do is order more of them and keep fucking around.
What I should actually do is redesign this board based on lessons learned and include some more self-protection features.
problem: no overvoltage protection on the mosfet gate
plan: add zener/TVS clamping diode
problem: mosfet failure to oscillate creates possible overcurrent condition
plan: current-measuring shunt + op-amp + etc to force mosfet gate low if device overcurrent
problem: layout is kinda bad for parasitics.
plan: make the layout less bad.
swear someday I'm gonna do my best to explain wtf is going on for all the non-electronics critters who so kindly follow me
in the meantime this is raw projectblogging
me: what's the deal with HV creepage (arcing/breakdown) distances under surface-mount capacitors? Seems to violate IEC design guidelines for minimum space
high-spec capacitor mfg: Hey here's some information about this exact question.
https://www.johansondielectrics.com/impact-of-pad-design-and-spacing-on-ac-breakdown-performance
like this is something that seems particular for electronics part manufacturers, even moreso than most industrial products:
they go out of their way to show you *exactly* how best to use their shit.
It makes learning about how to actually make stuff so, so much easier. You might need to wade through a forest of datasheets and application notes, but information is the opposite of obscured.
what people think electronics design is: routing pcb traces, brandishing a soldering iron
what it actually is (much of the time): squinting at poorly-photocopied performance curves in AZ23C51OMGWTF.pdf with calc.exe open on the 2nd monitor.
All right, so, I have this mosfet which I expect to be dissipating a fair bit of power (several watts, potentially >10W). In the previous prototype I used a THT part (SO-247) with a bolt-on heatsink, which worked pretty well.
Ultimately I'd prefer to use a surface mount part, and the device is also available in D2pak-7.
My plan was attach the tab to an oversized pad, drop an array of thermal vias to the ground plane on the opposite side, and mount the entire (single-sided) board's ground plane on a shared heatsink.
The problem is the thermal tab on this device isn't connected to ground, but instead is the pin for Drain. So I can't drop thermal vias to the ground plane.
Is the expectation that I use a top-mount heatsink, dissipate heat through a big power plane for Drain on the board's front, or what?
Here we go, a Revision 2 of the board! I think it's ready to send to the fab, but inevitably I'm gonna find some small things to tweak after posting.
Light blue rectangle is the outline of a big heatsink on the back side of the board.
Thanks to @gsuberland and @electronic_eel for their input on thermals :)
new boards already arrived!
ngl I'm a bit spooked by how fast and I
inexpensive it was, even though there's pretty explicitly some kind of promotional/loss-leader pricing going on.
Also these are 0.8mm boards (half of "standard" thickness) which should help with both front-back thermal conductivity and make the two-layer inductor a little more inductor -y.
oh yeah, seen in action here is a hot tip I'm only recently internalizing:
if you're making a thing and it has screw and/or mounting holes, mark the screw size/spacing directly on the object if at all possible.
it is with profound excitement that I'm able to finally unshroud the project I've been working on:
xenon plasma toroid
tried to run the toroid off of my beefier bench supply and blew a mosfet.
It's looking like the driver is probably drawing a lot more current than simulated. The miniware psu (and the USB-PD supply) I used yesterday handles brownout pretty gracefully, but I suspect the bargain bin bench PSU is less graceful.
Part of the higher power draw could be due to messy switching, but if I lower the primary cap values in the sim to 66pF (from the nominal 99pF) I get results more similar to the observed circuit. I don't think the frequency or temperature is high enough to cause that kind of de-rating but who knows, could be as simple as one of the three capacitors has failed.
Going to order some more caps, this time explicitly marked as low-ESL.
Still not sure what's up with the coil getting blazing hot.
...not the exact capacitors I have installed, but similar.
Using a bank of only three is *definitely* asking too much, even if I think things aren't quite as bad as 300°C/W. Note the log scale on x-axis.
Sincerely though, does anycritter have ideas on why the two-turn 1.9uH PCB coil gets so dang hot?
According to the saturnPCB calculator / IPC 2152, I'd expect less than 30°C rise to steady-state even taking skin effect into consideration, based on my ltspcie sims expecting ~12 peak amps at ~13MHz (sinusoidal).
I see like 70°+ temperature rise within a minute.
Guessing there's something going on with inductor energy getting dumped as heat, so resistive load calcs go out the window. But I have no idea how to reason about those possible effects.
lol so ended up just using I^2 *R just given DC resistance of a few tenths of a ohm and amperages in the 6-10A range...
that's multiple tens of watts of heat.
Very rough estimates of thermal mass give many degrees per second rise.
...yep there's a problem.
So the standard trace width calculations just aren't remotely applicable here apparently!
I now slightly better understand why other folks haven't used PCB inductors here.
I suspect I might still be able to donut with much lower amperages though! If I get down below 3A in the inductor, that's only like four watts heat rather than dozens.
<p>First Light accomplished. What did I learn?<br><br>The circuit in its current iteration,<br>1: gets hot alarmingly quickly<br>2: is trying to draw more power than I can actually supply. <br><br>Those seem related, yeah. <br></p><figure><img data-src="https://cdn.hackaday.io/images/6280501708053920075.jpg" class="lazy"></figure><p><em>apologies for the excessively american temperature units<br></em><br></p><p>Based on simulating the circuit in the condition tested, at 15 volts supply I'd expect to see something like 50W power draw, at around 3.5A. The tests discussed in the previous post sure looked like the USB-based bench supply was badly voltage sagging, so the next day I hooked up the beefier bench supply -- and very quickly started sagging, then blew another mosfet. I <em>suspect</em> that this very-budget bench supply has some sort of destructively un-graceful switch from constant-voltage to the constant-current mode it failovers to when it hits 5A, but it's also entirely possible that the mosfet blew first and I saw the power supply feeding a shorted chip. <br><br>My power budget is <5A @20V (the 100-watt maximum of USB-C-PD), but I'd prefer to stay <60W if possible.<br><br>If I simulate a lower primary capacitance (e.g. 66pF instead of the as-built 99pF), power draw is dramatically greater <em>and</em> the higher resonating frequency is also a closer match to what I observed on the
More progress on the plasma toroid! More videos! Less overheating!!
Writeup at https://hackaday.io/project/194683-plasma-toroid-sky-guided-pcb-edition/log/227790-tweakin
Higher-quality vid at https://www.youtube.com/watch?v=rEc76ckTJcg
<p>Spent a big chunk of the weekend adjusting a variety of component values. <br></p> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/7189551708888806047.png"><br>Here's the waveforms with the circuit unloaded (no toroid), at 18V supply:<span></span></figure> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/2465921708889099062.png"></figure> <p>Yellow is Gate (5V/div), purple is Drain (50V/div), blue is feedback network bias input at TP5 (5V/div).</p> <p>Looks decently healthy to me. I suspect that the gate protection zener diode is doing its job and helping to keep drive voltages within operational limits.<br><br>Here's the traces when the xenon is fully toroid-ing:</p> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/1735241708891968601.png"></figure> <p>Hm. Clearly the device is overall functional but these waveforms aren't as clean as I'd prefer. Maybe it's fine?</p> <p><br>All right, so let's walk through the component changes. I'll spare the step-by-step of each individual test -- most of it was poorly documented and I was going for more of a "better or worse?" approach than robust characterization. <br><br>First off, primary tank capacitance was increased 99pF to 141pF. This was the first change made, as planned in previous project log "<a href="https://hackaday.io/project/194683-plasma-toroid-sky-guided-pcb-edition/log/227533-i-would-like-my-circuit-to-not-cook-itself" target="_blank">i would like my circuit to not cook myself</a>". <br><br>Increasing capacitor value was broadly successful -- overall power draw was reduced to ~2.9 - 3.2A depending on circuit configuration. Yay!<br><br>Decoupling cap C4 was removed because it caused some kind of runaway oscillation on
More plasma toroid progress! Things are going super well!
Video demo:
https://youtu.be/fBrOaj5pBa0
I'm at a point where I could call this "done" if I wanted.
It's not done yet though ^_^
roflll, I'd been working hard to implement a subcircuit for monitoring current draw to indicate out whether or not the primary inductor was in oscillation, using a shunt resistor + op-amp + comparator etc.
And just now realized I can do the same thing *better* using nothing but a loop of wire and an LED.
Plasma toroid project writeup has been updated, with details of the non-contact indicator light shown in the previous video clip.
"status LED, galaxy brain style"
https://hackaday.io/project/194683-plasma-toroid-sky-guided-pcb-edition/log/228373
<p>Since a key goal of this project is to run standalone -- no o-scope, no bench PSU, no amperage panel meter -- it's crucial to have some sort of indication of whether the circuit was in oscillation or just sitting idle.<br></p> <p>Overall power draw reliably reflects the circuit's state. When not oscillating, there's near zero draw -- just LEDs, leakages, etc. While running the draw is more like 2-3 amps, and can be reduced down to as little as ~1.2A by lowering mosfet gate bias. </p> <h1>The normal approach</h1> <p>I had initially planned to use the pretty typical current monitoring method of a differential op-amp measuring voltage across a low value shunt resistor. Since I'm looking for a threshold current indicator rather than a continuous analog signal, the op-amp is fed into a comparator, against a reference voltage.<br></p> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/3954551711072740439.png"></figure> <p><em>Yes, this diagram is kind of sloppy, but you won't need to linger on details here anyway. If the text is unreadable due to aliasing you can click to embiggen.</em></p> <p>The TSM102 IC seemed like a neat combo-wombo of packaging two comparators, two op-amps, and a 2.5V reference all in one. It's also relatively inexpensive and can run off of a 40V Vcc. Purpose-built current monitor
ANOTHER plasma toroid project update: Pushbutton Arc Start!
https://hackaday.io/project/194683
This one is a big deal, since I've now hit every core functional milestone. The next steps are putting all of the subsystems together into a single, unified board.
This subcircuit is also neat because it uses multiple different bits of antiquated technology: photo-flash trigger circuits and gas discharge tube surge arrestors.
(demo vid attached here; high-quality available on youtube https://youtu.be/Vi6Pb0WSCZw )
status: v0.1 failure (mosfets destroyed: 5) v0.2 success v0.3 better performance Mission: Create an inductively coupled plasma toroid in a globe of xenon gas. The end goal is to have all electronics (including primary inductor) part of a single PCB running on USB-C-PD power, in a well-built and aesthetically attractive presentation. Inspired by "perfecting and explaining the plasma toroid" by BacMacSci https://www.youtube.com/watch?v=GbMAvn7nRWo The driving electronics is a "class E" self-oscillating circuit based on a SiC MOSFET. A ~2µH loop inductor is driven at 10-15MHz and >2kV, creating a strong electromagnetic field. If a 1-liter globe of ~15 torr xenon is placed in the middle of the inductor, the xenon will ionize into a conductive loop analogous to the secondary winding of a transformer. based on the work of Steve Ward and BacMacSci.
Like I spent literal hours today trying to pick out a heatsink.
Digikey has literally one hundred *thousand* heatsink SKUs from one vendor, and they're all permutations of solution space for the same basic design.
Neither digikey parametric search nor the manufacturer website narrowed things down very well. Even after several different dead ends to figure out what I actually wanted, I basically had to manually decipher the under-documented way this mfg was assigning model numbers.
At long last I am getting to the "finishing touches" stage of this design.
Mechanical CAD is already done.
[poll] release license for this project
[1] CC-BY-NC https://www.creativecommons.org/licenses/by-nc/4.0/deed.en
[2] CERN OHL https://cern-ohl.web.cern.ch/home
[3] "Make Good Choices" public license https://funputer.biz/licenses/gcpl.txt
[4] Don't Be A Dick public License https://funputer.biz/licenses/dbad.txt
additional context for items 3 and 4
https://funputer.biz/licenses.html
Btw: plasma toroid is still being very actively worked on! I did a circuit/board integration test "off-camera" because the prototype is very nearly identical to what the final version will be, but lacking in just a bit of ✨ sparkle 
that I want to publish fully-formed.
Currently waiting on another round of overseas PCB fab which I expect to take a couple weeks.
Feature added since my last update: overheat indicator light
(plus it runs cooler in general.)
So I said last update that I was gonna be doing a li'l something special for the final version of the plasma toroid board.
Here's the something special ✨
This is a board with dyed-black FR4 fiberglass and transparent soldermask (the layer that's traditionally green).
Not necessarily a *reasonable* expenditure but, woah.
Roadmap for Done is basically:
- assemble
- take good photos (Friend With a Macro Lens is out of town rn...)
- shoot a project video (probably a yak stack in its own right)
- so much writeup
- edit video...
Plasma toroid writeup updated
https://hackaday.io/project/194683-plasma-toroid-sky-guided-pcb-edition/log/230046
"#8: A Unified Board"
<p>It's been a busy couple of months behind the scenes -- this project is basically finished! I'll be breaking the final few updates into a couple posts, while I wrangle loans of camera equipment for the beauty shots. </p> <h1>Circuit Unification</h1> <p>Taking the different prototyped modules and banging them together:</p> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/4564281716833141406.png"></figure> <p><em>(you might have to click to embiggen)</em><br>I've paralled the mosfets for better heat dissipation. This doesn't help quite as much as one would like (since a lot of the losses are switching and not resistive), but it does help. The mosfet gate resistors are also paralled since they get <em>quite</em> hot before the arc is struck. I'm not sure why that behavior is occurring -- if you know, drop me a line!<br><br>The 4.3V zener diode (D5) for regulating gate bias is a carefully chosen value for this particular mosfet and circuit. Cranking the knob full-clockwise guarantees oscillations start, but doesn't set the bias so high as to cause excessive power draw and heating. The use of full knob range also makes adjustments more precise and controllable.</p> <p>A bank of four 33pF capacitors is a balance between heat distribution and board space. While the board itself has plenty of room (see below), I ran into
Plasma toroid writeup updated, with something a bit different:
an in-depth look at black-core FR4 and transparent soldermask PCB stackup, sponsored by PCBWay
https://hackaday.io/project/194683-plasma-toroid-sky-guided-pcb-edition/log/230233
<p>For the final build of this project, I wanted something special.</p> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/1192521717273710046.jpg"></figure> <p>Typical PCBs use a olive-green fiberglass core, layers of copper, and a (traditionally green) soldermask layer to protect the copper and define areas where solder/component pads should stick. This board instead has a dyed-black fiberglass core and a transparent soldermask layer. This means that all traces are visible as their natural copper color, which is delightfully high-contrast against the black substrate. Component pads and other areas left uncovered by the transparent mask are plated (ENIG) gold. <br><br>This order of circuitboards was <em><strong>(partially) </strong><strong></strong></em><strong>Sponsored by <a href="https://www.pcbway.com/" target="_blank">PCBWay</a>! </strong>They covered about 60% of the cost of these boards, and I paid the remainder out-of-pocket. <br><br>There's <em></em>very few photos out there of real PCBs made using this stackup, so I'm taking the time to write out a review. <br><br>(Transparency: being partially sponsored will likely bias my opinions, but I did also pay enough to feel like I have skin in the game. I have not given PCBWay any editorial control and they will not have seen this review prior to publication. Photos have been lightly post-processed and are broadly representative of how things look irl under good lighting. An order number [visible on the unpopulated
@skyguided Mm, the rounded traces are very pretty, I love that detail! And the fox!
I'm glad you address what the sponsorship does and doesn't mean, that's always helpful for this kind of article.
@Hearth lol when I actually look into it there's some approximations to make the math a lot easier than having to actually do integration of each half-cycle.
gate charge loss is minimal.
Output capacitance losses are ~3.6W.
Rise and fall time switching losses estimated at up to ~1.8W (using a kinda blunt method -- idealized switching times but full-current for the duration of switching).
Somewhere between 4-6W total would match my general intuition for toastyness relative to package size and claimed thermal resistances. Definitely hints that paralleling might not be the play here.
on the other hand, I observe *way* more heat at higher current levels, whereas theoretical output capacitance losses are constant with respect to current.
sky-guided
persist in your folly
Fudge
Graham Sutherland / Polynomial
MFierst
tyx
I love this, so I
acetone_kitten
Twenty Twenty Sixhorns
the Hearth 