x86: not even once

there are so many pitfalls in simulating the x86 ISA on a microarchitecture with RISC-like micro-ops (such as every x86 CPU on the market today), that you're better off just ditching the entire ISA for good.

everything about x86 sucks. the memory model for device access literally results in device drivers which make the system less stable than it needs to be.

you can literally put a PCIe card in an ARM system, and with a known buggy driver/firmware combination, it will be immediately more stable than in the x86 machine, because of the way processors that are *not* x86 handle device access.

there have been speculation bugs on ARM, and on POWER, but none as severe from a practical exploitability perspective as the speculation bugs on x86 processors. this is because outside of x86, things are just more strict in general. where x86 lets you get away with crimes like unaligned access, the rest of the ISAs smack you down with exceptions.

@ariadne Eeyuppp!

There's a reason #Transmeta literally did design their chips to emulate #amd64 & #ix86 with an architecture that isn't an #ISA a OS can even directly utilize.

That being said, I'm confident that #ARM / #ARM64 will be a stepping stone till #RISCV is mature enough to become mainstream (i.e. 20 Years) and cheap $10 #FPGAs allow running one at a performance that is on-par to then current #AppleSilicon SoCs and faster than any current-day #AMD64 can be.

@kkarhan riscv64 is hard to scale performance wise due to some design mistakes in the ISA that make it hard to do efficient out of order cores
@ariadne I hope #128bit #RISCV will fix that...
@kkarhan more likely a new revision of the risc-v isa will happen to fix it