PDS – the Programmers Development System – Part 2
This series of posts looks at the Programmers Development System (PDS).
- Part 1 – Introduction, background and some initial reverse engineering.
- Part 2 – A closer look at the PC ISA Interface card.
Having now got a bit of an idea of how the PDS appears to work in my previous post (PDS – the Programmers Development System) I’m now taking another look at the PC interface and starting to think about the possibility of recreating the system.
The PC Interface
Having decided I couldn’t rely on the schematic on the CPC wiki, I’ve taken the printout-versions of the PCB traces and started tracing them through to see what is really going on. It was greatly helped by the PCB view that can be found here: https://lemmings.info/pds-programmers-development-system/
Of course, I am assuming here that the remade PC card does actually work.
It turns out the ISA to Intel 8255 part was fine, including the address decoding, but the three 8255 IO ports, through the octal line buffers, to the two PDS links are fundamentally missing some key links.
Essentially the three 74LS244s are configured for half in A->Y form and half in Y->A. The three IO ports (PORT A, B, C) are also split in half. This means that most of this circuit is working in 4-bit chunks.
The high level linkages are shown below.
So here we can see how the A halves of each of the 244s handles OUTPUT and the B halves handle INPUT. We can also see that U5 (sticking with the original schematic numbering for now) handles the control signals, U4 is D4-7 and U3 is D0-3. PORTC drives U5 and thus also handles all control signals.
We can also see that the data lines are now fully bidirectionally connected so that each can be connected to an OUTPUT or an INPUT depending on the state of the PC2 line. PORTB handles the OUTPUT and PORTA is the input.
The control signals are still mirrored as determined in the first part, but now we can see that some are OUTPUTs and some are INPUTs. The mappings from PC0-7 through to the link pins is shown below (note I’ve reverted to using the same PDS connector pin numbers as the ZX Spectrum schematic in the diagram above and table below).
PIODirectionLink 1 PinLink 2 PinPC0OUT313PC1OUT133PC2OUT1111PC3OUT99PC4IN515PC5IN155PC6IN7N/CPC7INN/C7
There are two swapped pairs of connections, two common, and one unique to each.
As mentioned previously, the ZX Spectrum interface does not connect to pins 9,11,13,15 so that implies to me that it would not work out of link 2 without remapping in the software for the alternative pinout.
From working through the ZX Spectrum monitor code in part 1, we can infer the following functions:
- Pin 3 (OUT): PC to Target CLOCK
- Pin 5 (IN): Target to PC CLOCK/ACK
We can also note the following:
- Pin 11 (OUT): Direction based on PC2. HIGH = PC to Target; LOW = Target to PC
From this point I can now fully recreate the schematic and start to think about recreating the PCB.
The PC Hardware
One slight sticking point in remaking the PCB was getting useful dimensions for an XT era ISA card. Two useful references I found were:
The actual spec wasn’t massively useful to me. I don’t know if the ends of cards was slightly different in PC XT systems, but it doesn’t seem to match the photos of the PDS PC card. The second link was very well researched and complete however, so I went with that.
One compromise though was trying to keep the card within a 100x100mm footprint, so I’ve not extended completely to what I believe will be long enough to have an end plate.
The Schematic
The updated schematic is shown above. I’ve added a few things I’d expect to see on a modern design – additional 100nF capacitors (one for each IC), and a resistor network to pull up all unused inputs to the 74LS04.
I originally went with the ZX Spectrum version of the 16-way connector, but then when it came to assigning footprints, to get a right-angled IDC connector meant pin one was now in the wrong place, so I had to revert to the alternative pin numbering as per the original schematic.
The PCB
I’ve followed the original layout used on the PC card remake as far as possible, reasoning that the person who did this almost certainly knows a lot more about electronics than I do.
One thing I wasn’t sure about was a GND fill. I initially created a fill zone, but then decided I’d follow the original lead and use explicit GND connections. If someone advises that a fill will be better then it is pretty trivial to add in.
Other points to note:
- A already mentioned I’ve kept this within the 100x100mm footprint. This leaves two unknowns: will it be tall enough to be useful; and will it extend to the edge of a PC case?
- The two connectors extend beyond the edge of the PCB, so they hopefully will be available at the edge of a PC.
- The dimensions are such that more of the PCB is off to the right compared to the photos of the remade board I’ve seen.
- I’ve not been able to include mounting holes in any useful position whilst retaining the 100x100mm footprint.
This will do for now, but I think it is highly likely there will need to be some physical adjustments for this to be usable.
Conclusion
I believe I’ve got an accurate schematic for the board based on the photos available and I now have design for a candidate PCB. The problem is that I don’t know anything about what the software is expecting when it drives the Intel 8255 to work the PDS interface.
There is also the small matter of needing an ISA bus in a PC…
I’m hoping to get these boards published somewhere but right now, I’m not clear what the licensing issues would be. These boards are not available anymore, but at some point this was a company’s IPR.
For now, I’ll keep blogging observations and see what the interest is.
Next up will be some remake of the target PCBs.
Kevin
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