A CH32V003 library for ST7789-based displays:
https://github.com/artyom-poptsov/ch32v003-st7789
OpenC6 BIOS project brings PC-like firmware to ESP32-C6 MCU with network boot and OTA update support
OpenC6 BIOS is an open-source project by Rompass that takes a different approach to MCU development. It adds a BIOS-like system to the ESP32-C6, so the system part and application code can run separately rather than being combined into a single firmware image. In traditional development, hardware setup, networking, and application code are combined into a single firmware image. But the OpenC6 BIOS operates differently: it runs as the base system on the ESP32-C6 and handles hardware initialization and system functions. Instead of flashing a full application each time, it can load small payload programs separately. These payloads can run from RAM or flash (XIP) and use system functions through a simple Application Binary Interface (ABI), without needing the full firmware. In some ways, it operates like AkiraOS, but with a BIOS-like interface. Key features of the OpenC6 BIOS architecture: Dynamic CPU scaling – Adjusts CPU frequency based on load
Linux powers a huge share of the technology we use every day: desktops, #cloud and servers, VMs and #containers, #ARM and #RISCV, #AI, emerging #quantum systems, and more! 🐧🐧💪
Take a deeper look at Linux’s impact in this series by Simone Davide “Simo” Bertulli: https://lpi.org/ydk1
[Disclaimer: This post includes an image generated using AI.]
#linux #opensource #cloudcomputing #ai #iot #lpi #devops #vms #foss #cybersecurity
RISC-V - Qualcomm eyes ByteDance (TikTok) deal in bid to rival Nvidia
#riscv #nvidia
cryptopolitan.com/qualcomm-byt…
According to Reuters, on May 28, ByteDance began making its CPU-based chips using Arm and RISC-V architectural designs as a result of bottlenecks in the supply chain, as well as rising component costs.
Linux 7.2 RISC-V Reduces Kernel Startup Overhead, Eswin SoC Support By Default
I pre-ordered a milk-v titan back in December. Still have not heard anything.
I pre-ordered a sipeed k3, in May. Still not heard anything about when it is expected to arrive.
Seems to be impossible to get anything with 32GB ram these days.
Seems like those RISC-V K3 machines with 32GB ram is sold out everywhere. Would love to have a couple of those for building Alpine Linux packages.
Are there anyone who could help us with getting one or two of those? Preferable the pico-ITX.
Also, don't #ARM me. #RISCV is an ideological choice - ARM needs to feel the pressure.
Best read yourself - about the embedded MMU situation from @bunnie who decided to do sth about it: https://www.bunniestudios.com/blog/2026/baochip-1x-a-mostly-open-22nm-soc-for-high-assurance-applications/
What's the lowest-power #RISCV #microcontroller ?
I'm planning to use the low-power core of ESP32-C6 for #jazda (no less than 7µA), but I'm sure there are cores that go lower than that.
Also, I'm running out of I/O pins on the -C6 and I might need to augment it with a "south bridge"...
Olimex
avp
cnx-software.com [Unofficial]
Linux Professional Institute
hoergen
Natanael Copa
dorotaC