I now have a working #IEEE #1588 hardware-corrected #time sync setup using an #Intel #I226V card. No #Arista switch required. FreeBSD #ptpd slave sees #linuxptp master. Yet to test with the #NVidia #Mellanox #ConnectX-4 LX clients in #FreeBSD though. #BeagleBone Black support appears broken. Awaiting a #SiRFStar IV USB #GPS with alleged #PPS capability, and yet to recover my #GPSDO unit from my aunt's attic in Fife.

I'm forever wanting more/reliable #linux #freebsd #serial #console. While the latest 1U servers have working ipmi and BMCs, there are still many older systems that do not, plus #beaglebone #rpi and random ESP32 things.
USB serial has gotten better, with many devices now having actual serial numbers (without which, the ports come up randomly), but there are still many challenges. RS232 (+-12V) vs 5V-TTL, 3.3V TTL, and even 1.8V TTL. NULL modem vs not. RTS/CTS desired, but often a problem.
I wonder if it's possible to (via small FPGA?) to do such a thing.
Maybe it just needs to be an expensive debug tool that tells people who didn't live through the 1980s how to hook stuff up. Maybe @azonenberg has a notion. Are there I/O pins that can do -12V/+12V or 1.8V? Obviously when debugging, one wants to listen to all pins for a signal, figure out how strong it is, and which is the TX and RX, and then reprogram.... and only then exceed 1.8V.

Last chance to express your voice about 32-bit #ARM on #openSUSE? Take the survey now https://survey.opensuse.org #ARMv7 #RaspberryPi #BeagleBone

Calling all #RaspberryPi1, #PiZero, and #BeagleBone users! The #openSUSE Project is re-evaluating 32-bit #ARM support (ARMv6/v7) and wants your feedback. https://news.opensuse.org/2025/07/10/project-seeks-input-on-32-bit-arm/

What's a caterday electronics project without a supervisor? 😼 #ws2811 #beaglebone

Well, this is annoying. Somewhere between v6.9 and v6.10, one of the serial ports on the #beaglebone black stopped working properly. It has something to do with DMA. I guess the AM33xx has reached the stage of gradual deterioration in kernel support where little things keep breaking but nobody notices because all the developers have moved on to newer, shinier things.

I know this is totally out of context, but I just got the Rascal 110 model to initialize stably on the ground from a standalone JSBSim/python script. I'm stoked because now I can work on porting my launch task from python(#beaglebone) to C++(#teensy) ... with the ultimate goal of converting my big processor/little processor flight control system to run entirely on a teensy (medium processor.) The goldylocks processor? :-)