Jonathan Balkind

147 Followers
217 Following
407 Posts
Assistant Prof @ UCSB CS. Formerly Princeton and Glasgow unis. He/him. Opinions somehow my own

Apparently I missed that Tony Hoare died last week. (EDIT: Apparently two weeks ago, the obituary I saw didn’t have the date of death and was from last week).

I think the first time I met Tony was when we were both on the same panel. The Psychology of Programming Interest Group (PPIG) conference arranged a panel with some people from their community and two relative outsiders. They didn’t tell me until I turned up that there were only two and I was the one without a Turing Award or a knighthood. I was, as you might imagine, somewhat intimidated by this. Tony was amazing. He made me feel like we were just two peers in the subject, each with valid opinions to contribute.

I spent a few years with my office a couple of doors down from his. He was always happy for people to drop in and chat. I went to him with questions periodically and always learned something. Rarely an answer to my question, but always something interesting.

A huge loss to the field.

@CanLehmann you really get it!! Thanks for sharing. I hope once I do the code release that the power of this kind of methodology will be clear. We could be doing all this kind of design in a completely different way
We will be presenting at LATTE in a couple of weeks during ASPLOS in Pittsburgh! Our talk will be on our ongoing work on porting the @ClashHDL compiler to CIRCT. It's a super fun project where we get to explore some neat optimizations and cool IR design. If you're interested in learning more about it you can read our short LATTE paper here:
https://www.cs.princeton.edu/~ad4048/pdfs/latte-2026-submission-14.pdf

Undergraduates and junior graduate students! Want to attend ISCA 2026, meet your cohort, and participate in some professional development? Both YArch and uArch are calling for your applications!

YArch @ ISCA 2026
Tentative paper registration deadline is March 27, 2026
https://yarch2026.epfl.ch/

uArch @ ISCA 2026
https://sites.google.com/view/uarchworkshop/home
Travel grants for uArch (Undergraduate Architecture Mentoring Workshop) 2026, Deadline March 6th, 2026

Info for Students:
We are excited to host enthusiastic undergrads and early master’s students who may be interested in graduate studies in Computer Architecture, but who do not have an extensive network or guidance to make an informed decision on the topic. The workshop is open to all qualifying students and there are full and partial travel grants available for students: Apply here: https://sites.google.com/view/uarchworkshop/apply
uArch workshop is held in conjunction with ISCA 2026, on June 28, 2026.

Info for Sponsors/Professors:
Consider partially sponsoring an undergraduate for the uArch workshop by applying here (https://sites.google.com/view/uarchworkshop/apply) directly.

YArch'26

Finally, we have a proper journal paper about Spade 🎉!

It is a pretty complete description of the current state of the language, but I'm honestly more excited about the way we managed to argue for having a new HDL at Spade's abstraction level, roughly RTL but with zero cost abstractions on top

https://dl.acm.org/doi/10.1145/3793550

who called it "ASIC design" and not "the linter-industrial complex"

Hardware design should be SAFER!

Memory-safe software languages changed the world and allowed to us to build massively larger systems. At their heart, memory-safe languages eliminate a category of bugs that pointer-manipulating programs suffer from.

Hardware design needs its own safe programming models but instead of memory, the problem is time! Synchronous hardware design needs to deal with a clock signal which creates discrete time steps. Every hardware module needs to think about how time affects its own logic and everything it communicates with. Getting it wrong leads to all sorts of logical bugs: reading meaningless values and using resources that are unavailable.

Our work on Filament (https://filamentHDL.com) defined a criteria for safe hardware description languages (HDLs) and showed that you can enforce it using a type system and introduce no overheads. Safe HDLs have become an interesting area of research and this year's ASPLOS features two papers exploring different threads:

- Lilac (https://arxiv.org/abs/2401.02570): Builds upon Filament applies its safety guarantees to parameterized designs. A cool outcome of this work was to show that, in addition to helping with verification, safe HDLs enable the design of fundamentally new abstractions!
- Anvil (https://arxiv.org/abs/2503.19447): Explores how Filament's verification abstractions can be applied to a higher-level, message-passing HDL and enforce safety properties!

I'm really excited to see where this line of work goes and what we can build with it! If you're around at ASPLOS and interested in this kind of work, come say hi and go watch the talks!!

Filament | Fearless Hardware Design

Save big with our SIGARCH Cyber Monday deal: a new blog and two calls for workshop contributions

The Hitchhiker’s Guide to Coherent Fabrics: 5 Programming Rules for CXL, NVLink, and InfinityFabric
by Zixuan Wang et al. of UC San Diego
This is the second article in their series.
https://www.sigarch.org/the-hitchhikers-guide-to-coherent-fabrics-5-programming-rules-for-cxl-nvlink-and-infinityfabric/

Call for contributions: 2nd Workshop on Architecture for Health (Arch4Health 2026)
31st January 2026, Sydney, Australia
co-located with HPCA 2026
https://www.sigarch.org/call-contributions/arch4health-hpca-2026/

Call for Papers: HCDS 2026 – 5th Workshop on Heterogeneous Composable and Disaggregated Systems
co-located with ASPLOS 2026
March 22, 2026, Pittsburgh, USA
https://www.sigarch.org/call-contributions/call-for-papers-hcds-2026-5th-workshop-on-heterogeneous-composable-and-disaggregated-systems/

The Hitchhiker’s Guide to Coherent Fabrics: 5 Programming Rules for CXL, NVLink, and InfinityFabric

This is the second article in the series, following our first blog in Dec 2023: Modern applications are increasingly memory hungry. Applications like Large-Language Models (LLM), in-memory database…

SIGARCH
Liquid heated cat beds powered by liquid cooled data centres
Congratulations to Dr. @Hello_KayT on her thesis defense (and excellent headgear)!