A Tiny FABulous FPGA on Tiny Tapeout? It's more likely than you think!

Yesterday the TTIHP26a shuttle (https://app.tinytapeout.com/shuttles/ttihp26a) from #TinyTapeout has closed. In it, hundreds of incredible projects.
You can view the full shuttle and its designs here: https://app.tinytapeout.com/projects/3744

I had the opportunity to submit an FPGA, which I created using my FABulous LibreLane plugin. For this fabric, I developed a "tiny" tile library that better fits the constraints of Tiny Tapeout.

#FPGA #ASIC #TinyTapeout

While it is a small FPGA in terms of available resources, it is absolutely massive for a Tiny Tapeout project. It utilizes 8x4 TT tiles to implement an FPGA with 9x5 FABulous tiles. In total, there are 168 LUT4s and FFs available - enough for some simple designs!

Here, you can see the device utilization for a 22-bit counter:

Info: Device utilisation:
Info: FABULOUS_LC: 23/ 168 13%
Info: IOBUF: 25/ 26 96%
Info: GBUF: 1/ 4 25%
Info: SYS_RESET: 0/ 1 0%

With four GBUFs, the FPGA supports up to four separate clock domains.

If you look closely at the render, you can see see the boundaries between the tiles in the FPGA fabric. There are 3x7 CLB blocks surrounded by I/O and termination tiles.
You can view the design in 3D in your browser (warning, the design is huge!): https://gds-viewer.tinytapeout.com/?model=https://raw.githubusercontent.com/mole99/tt-fabulous-ihp-26a/refs/heads/main/gds/tt_um_fabulous_ihp_26a.gds&pdk=ihp-sg13g2
Tiny Tapeout GDS Viewer

User designs that run on the FPGA can be implemented with Yosys and nextpnr, for a fully open-source FPGA workflow.

The FPGA was generated using the FABulous eFPGA framework (https://github.com/FPGA-Research/FABulous) and implemented using LibreLane (https://github.com/librelane/librelane) with the IHP Open PDK (https://github.com/IHP-GmbH/IHP-Open-PDK) using my FABulous LibreLane plugin (https://github.com/mole99/librelane_plugin_fabulous).

Check out the repository and the source code here: https://github.com/mole99/tt-fabulous-ihp-26a

I'm looking forward to trying it in real! 👏

@mole99 tiny FPGA demoscene competition time?
@kbity Uhh, absolutely 🤩
I'm curious to see what VGA designs are possible. The FPGA is directly compatible with the Tiny Tapeout pinout and therefore the TinyVGA Pmod.