Finally playing with logic schematic design in #quartus for my #DE0-nano #FPGA #dev board.

Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, #IDE controls to learn.

Standing on the shoulders of giants. If you FPGA, you rock.

Joy... win11 accepts my old #DE0-Nano #fpga dev board's #Altera #usb #blaster drivers, and a demo prog now talks to the board. Whoosh.

Next, I pray that I get good at turning logic design schematics into deployable code.