Mastodawn

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FCLC Mar 30

Happy place @ the Computer History Museum!

FCLC Mar 15

With how much planning Singapore puts into things, surprised they’re still using RJ45 jacks instead of QSFPs 🤔

FCLC Mar 15

For once get to watch parts of the Australian GP without being on weird timezones 😂

#F1

FCLC Mar 2

Worse ways to fall asleep

FCLC Feb 27

No place like home

FCLC Feb 24

"All lessons in tech will be relearned every 25 years"
-Me, looking at us relearning the same thing again

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@fclc feeling generous today?
Any BLAS advice about a hobbyist project with an old Xeon Phi?

@ChristosArgyrop Depends a lot on the level you're working on; latency to the MCDRAM can be problematic, as can driving peak flops based on the size of memory

@ChristosArgyrop For GEMM, this may be of use! https://www.acsel-lab.com/arithmetic/arith24/data/1965a144.pdf

@fclc I actually have this paper - it is one of those that made look again into the architecture since FP64 devices are not cheap nowadays. Intel had funded some other projects for bioinformatics on the platform. One cannot beat a price of 40 to 80 dollars per device for their FP64. I think series 7 also had the AVX512 set as well

@fclc Iterated Reweighted Linear systems ; will probably code it in PETSc so I can reuse the code to compare GPU , Phi , Xeon, and i7 (AVX512 lol) for fun. Lots of Phis at EBAY now, worth playing with them

@ChristosArgyrop They're really fun devices! need to get one to stick on my wall

@ChristosArgyrop As for the code, you'll have to be careful on operation systems, compilers and libraries; most of the old Phi code has been deprecated.