PCB floor-planning for high density

This week, I'm getting a feel for how to pre-plan for #FPGA #electronics with high pin counts. Generally, we try to minimize the number of "hop-overs" among copper traces. Luckily, the manufacturers were very organized and grouped their pins together by function...

North: Differential analog
East: RAM addresses 0~28
South: RAM parallel data 0~31
West: User-defined pins

Center: Configuration and debug

Northeast: Bank 15
Southeast: Bank 14
Southwest: Bank 34
Northwest: Bank 35