Happy Mainframe Day!
OTD 1964: IBM announces the System/360 family. 8-bit bytes ftw!
Shown: Operator at console of Princeton's IBM/360 Model 91.
Happy Mainframe Day!
OTD 1964: IBM announces the System/360 family. 8-bit bytes ftw!
Shown: Operator at console of Princeton's IBM/360 Model 91.
@aka_pugs Really was the beginning of the modern era of computing, starting with the normalisation of 8-bit bytes and character addressable architecture.
Well, that's all true so long as we don't mention EBCDIC 🙂
@aka_pugs @markd ASCII mode was only about how some of the decimal arithmetic instructions behaved. For the printers, the character set was pretty arbitrary, and the Translate instruction would have allowed for easy compatibility no matter what. The real EBCDIC issue was the card reader—and per Fred Brooks, IBM wanted to go with ASCII but their big data processing customers talked them out of it.. But that's a story for another post. (And 8-bit bytes? Brooks felt that 8-bit bytes and 32-bit words was one of the most important innovations in the S/360 line. It wasn't a foregone conclusion—many scientific computing folks really wanted to stick with 36-bit words, for extra precision. IBM ran *lots* of simulations to assure everyone that 32 bit floating point was ok.)
Why yes, in grad school I did take computer architecture from Brooks…
@SteveBellovin @aka_pugs If you were on the non-EBCDIC side of the fence you got the impression that IBM sales pushed EBCDIC pretty hard as a competitive advantage - even if their engineering covertly preferred ASCII.
The 32-bit word must have been a harder-sell for the blue suits since the competition were selling 60bit and 36bit amongst other oddballs.
Fortunately the emergence of commercial customers marked the declining relevance of scientific computing... Did IBM get lucky or were they prescient?
But yeah, the S/360 definitely marked the end of the beginning of computing in multiple ways.
@markd @SteveBellovin IBM had a huge lead in commercial data processing because of their punch card business. And that world did not care about floating point. The model 91 was an ego-relief product, not a real business. IMO.
Data processing and HPC markets never converged - until maybe AI.
@SteveBellovin @stuartmarks @aka_pugs @JohnMashey All of which (punch card focus, overloading high order pointer bits, packed decimal, 6bit bytes, scientific vs commercial, memory parity, two-speed memory) signalled the beginning of the end of an era where programmers and engineers counted every bit, every machine cycle and every memory reference. An era where programmers optimised hardware rather than round the other way.
While the need to deal with feeble compute power created interesting and novel architectures (Singer System Ten anyone? - https://en.wikipedia.org/wiki/Singer_System_Ten), the lock-in was a nightmare for customers embarking on their (oftentimes first) tech refresh.
So sure, one can readily admire the S/360 design, nonetheless, its biggest contribution may have been as an extinction event for all those oddball architectures due to market dominance.
@JohnMashey @markd @stuartmarks @aka_pugs Other than marketing issues, I've heard three major criticisms of the architecture—and bear in mind that these decisions were made in the early 1960s; unless you were programming then or shortly thereafter, your instincts on RAM and logical complexity are likely wrong.
The first is the I/O architecture. Blaauw and Brooks, in their book, agree that it wasn't the greatest. That said, I know of some amazing (or weird) things that could be done with it, which I'll save for another day. The second is that it should have been a stack machine. That was, in fact, the original goal, but Amdahl showed that it wasn't wise from cost/performance perspective: except on the high-end models, you couldn't afford to have more than two levels of the stack in registers; the rest would be in RAM (which we called "core"…). Yes, the machine did have 16 "general registers", but it didn't need the circuitry for moving data around as entries were pushed onto or popped from the stack. The extra references to RAM were not good for performance, and needed more logic.
The third was addressing: the S/360 used "base-displacement" addressing for RAM. An actual address was the sum of a general register's contents and a 12-bit displacement.* Together, the two fields occupied 16 bits. To use absolute addresses, you'd have needed 32 bits, plus more for an index register and probably an indirect address bit. The cost in RAM for instruction space and in time to fetch the extra data from memory—this was before memory caches, which weren't until four years later—was prohibitive. (I once overheard a conversation between Blaauw and Brooks on that topic, ~10 years after that S/360 was announced—they still didn't see what they could have done differently, given the technology of the time.) As a fringe benefit, writing position-independent and reentrant code became very easy, and object and executable files needed very little disk space for relocation information.
One thing often missed about the S/360 is one of the things Brooks was proudest of: how precisely they were able to specify the semantics of every instruction, and have that work, across six models, the /30, /40, /50, /60, /62, and /70**, with very different implementations and price/performance.
*Minor exceptions apply
**The /60, /62, and /70 were never shipped, being replaced by the /65 and /75; a variant of the /65 with virtual memory was shipped as the /67. The full history is complex; see https://en.wikipedia.org/wiki/IBM_S/360 for details.
@JohnMashey @aka_pugs @markd @SteveBellovin sounds like Motorola copied their reasoning years later, with the MC68000.
For us UMich folks, the 360/67 was the machine that mattered...
@hyc @aka_pugs @markd @SteveBellovin
Some users who knew about R4000 wanted to use the high bits as tag bits. I said NO!
@JohnMashey @hyc @aka_pugs @markd Brooks said that the 24-bit address decision was an economic one. But he also recognized, and stated, that "every successful architecture runs out of address space." (Aside: that's one reason why IPv6 addresses are 128 bits instead of 64—I and a few others insisted on it, and I specifically quoted Brooks' observation.) But there was one really crucial error in the S/360 architecture: the Load Address instruction was defined by the architecture to zero the high-order byte, making it impossible to use that instruction on 32-bit address machines. Since LA was the most common instruction used, per actual hardware traces, this was a serious issue. (It wasn't only used for addresses; indeed, many of the instances were to provide what Brooks called the "indispensable small positive constant".) The I/O architecture was also 24-bit, but that didn't bother the architects—they figured it would be replaced with something smarter later on anyway.
Update: I forgot about the Branch and Link instructions, which were used for subroutine calls. Per the Principles of Operation manual, "The rightmost 32 bits of the PSW, including the updated instruction address, are stored." The high-order 8 bits of the PSW included the "condition code", used for conditional branches, and the "program mask", which could be and was changed by application programs to disable some software-related interrupts, e.g., fixed-point overflow. This instruction was also not 32-bit-address compatible. (In Blaauw and Brooks, they note that extension to 32-bit addressing was seen as desirable and necessary from the very beginning.)
@SteveBellovin @hyc @aka_pugs @markd
Agreed, I wrote a lot of S/360 assembly code & LA was very useful.
Although not architectural, but software convention, using high-order bit in last ptr argument in argument list persisted.
On economics, I do wonder how much $ the 360/30-based decision cost IBM in the long term, in terms of software/hardware complexity.