Good read on #VHDL’s delta cycle algorithm in action. Delta cycles are an #HDL concept used to order events that occur in zero physical time:
VHDL's crown jewel
https://www.sigasi.com/opinion/jan/vhdls-crown-jewel/
VHDL's crown jewel
How VHDL preserves determinism In this post, I would like to talk about VHDL’s crown jewel: how it preserves determinism in a concurrent language. Here is a figure of how it works:
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