Craig Bishop

I made a bunch of progress reversing the clock-generator section of this XCVU13P #FPGA board last night. I'd like to find a better clock source than the config clock.

The Si5345 clock gen is the center-piece with a Si570 programmable XO as one of the inputs. There's also an SMA input and a diff pair input from the FPGA.

Most of the outputs go to the MGTREFCLK[0] pins for various quads, but OUT8 and OUT9 go to FPGA global clock inputs. That was super promising, but there’s no output on boot 🤨

Mar 22 at 7:56pmWeb
Show threadCraig Bishop19h ago

It turns out that the Si5345 doesn't have a config stored in NVM, so no clock outputs come up automatically. Its I2C interface is connected, but it goes to an FTDI FT4232HL, so it looks like a host computer has to configure the clocks…

There could be some hope for a self-contained config though since there's a depopulated bidir level converter footprint that is routed to the #FPGA

Show threadDarrell Harmon19h ago
@craigjb Are any of the MGTREFCLK ones on? Those are also fairly straightforward to get to a global clock.
Show threadCraig Bishop19h ago
@dlharmon ooo, good question!
Show threadCraig Bishop18h ago
@dlharmon Worth a check, but all the MGTREFCLK outputs are disabled too. I did get the Si5245 to show up on I2C via the FTDI chip though.