YRabbitMar 12

#nextpnr release! 🍾

https://github.com/YosysHQ/nextpnr/releases/tag/nextpnr-0.10

Release nextpnr 0.10 · YosysHQ/nextpnr

archapi: New "resources" API to represent mutually exclusive routing resources gatemate: Performance improvements, floorplanning support, support for use of more routing resources gowin: initial GW...

GitHub
Show threadFluxMar 12
@yrabbit nice to see some GW5 stuff in there. đź‘Ź
Show threadYRabbitMar 12
@WillFlux This time, not everything is mine 🤣 - @gatecat made a big contribution.
Show threadFluxMar 20
@yrabbit is it possible to summarise the state of GW5 support? Clocks, bram, DSPs etc.
Show threadYRabbitMar 20

@WillFlux

The GW5A family isn't actually a set of chips that differ in the number of LUTs—as it turns out, it's a marketing name for at least 3 different architectures: 25k, 60k, and 138k. They differ in their PLLs, clocks, SSRAM, DSPs, HCLKs, and even their bitstream organization, for heaven's sake!

Starting with the GW5A-25A, I’ve built a clock, OSC, PLL, ADC, BSRAM, ALU, and DSP. Right now, I’m working on the HCLK and IDES/OSER—the routing is already working; I just need to set the fuses.

Show threadYRabbitMar 20

@WillFlux

I also took a look at the GW5AST-138C and built an SSRAM (which isn’t available in the 25k version) and a simplified version of the clock.

Show threadYRabbit
@WillFlux @gatecat added BSRAM support for the GW5AST-138C—well, because it's different from the 25k ;)
Mar 20 at 10:37amWeb