Did a few high res images of the Pervasive E2213PS0E1 EPD. This is a B&W panel that looks significantly different from the black-white-red one I looked at before.
For starters, here's the full panel (flipped vertically as if seen from the front, so text looks correct).
https://siliconpr0n.org/map/pervasive/e2213ps01e/azonenberg_back_mit5x_rotated/
Higher res view of drive logic along the left side.
There's a few stitch artifacts but it's better than nothing. I really need to find a good tool for stitching these huge image datasets that lets me apply corrections for misaligned tiles.
This image is also flipped so text appears right side up.
https://siliconpr0n.org/map/pervasive/e2213ps01e1/azonenberg_back_roi1_mit10x_rotated/
Interesting rectangular test patterns (and some stitch artifacts).
The haloing around the high contrast edges is a focus stacking artifact. I think I'm going to switch from stacking to contrast-guided optimization where I pick the single highest contrast tile at each X/Y location rather than merging them to avoid this issue (especially for situations where I'm using a huge stack range to track large planarity errors).
This looks like layer version markings but the names are a little confusing (especially where multiple exist).
I think from this that blue is likely a-Si transistor material. Green is obviously ITO, white is M1, purple M2.
Less clear about light blue, is that possibly an ITO-aSi stack? And what's SINX and GIN and PASS?
Beautifully labeled test points (?)
Wondering what the horseshoe shaped structures on M2 are. ESD diode strings, maybe, from each test point to the ITO layer? Using the ITO as an ESD return doesn't make a whole lot of sense it seems like it'd be easily damaged.
Single frame of the test point area showing the difference in image quality for a single frame vs a stitch. Note the sharper edges with no haloing.
Also interesting seeing the weird cutouts in the test points. Is this for electromigration resistance? Doesn't seem like that would be a major concern for something as short-term-use as a test point.
A few pixels seen at higher magnification with the individual e-ink particles visible.
The image is a little blurry no matter what I do focus wise, I think this is the anti-glare coating acting as a diffuser.
Closeup of what I think is bit line drivers for the pixel array.
I'm not 100% sure on what the overall circuit structure here is but I think the right vertical strap on M1 is probably the HV supply going to the source of a TFT, then the bus coming in from the left is connected to the gates, and the horizontal M2 lines coming off to the pixel array tie to the drain.
But where exactly is the transistor itself? I see a bit of bluish haloing around the large rectangular squares and I think that might be an indicator of a-Si presence.
There's also a more dark purple area where the M1 and M2 lines cross, perhaps extra dielectric? I don't think it's a via as that wouldn't make a ton of sense?
Andrew Zonenberg
toybuilder