jacquelines 🌟someone should make a jlcpcb bingo card. so far i’ve got
“asked to confirm there’s no copper in my gerbers”
and
“incurred the fee for too many slots”
1.3.6.1.4.1.61513@jacqueline I've wanted to make a PCB fab stress test board
Martin Piper (he/him) 💙💛🌻💉@xssfox @jacqueline now I want to too.
@martin_piper @xssfox if you ask aisler nicely then they will send you some if theirs. they make super neat little conversation pieces re: the challenges of pcb production
@martin_piper @xssfox (my fav thing about this -- something i didn't previously know -- is that the closest trace width on this board is designed to fail. if those traces don't bleed into one another, then they haven't put enough copper on the panel or w/e
@jacqueline @xssfox this is splendid.
Brendan@jacqueline Do they test those coppered areas against a standard capacitance? It seems like it'd be a great way to confirm the spacing between the traces.
AISLER@jacqueline @brendan We just electrically/optically inspect the coupons.
jaseg@brendan @jacqueline It's not just about the spacing, but also about how those traces' edges look: How rough they are, and what their profile looks like, if they have an angle. Capacitance is only going to image a fraction of that.
@jaseg @jacqueline a frequency vs reactance plot would probably be pretty sensitive, but not straightforward to interpret. I can see why they do optical inspection.