Andrew ZonenbergJul 15, 2023

Reworked all the bridges on the ESD diodes that I found during initial visual inspection, and tidied up a few bulk caps.

Did continuity tests to sanity check on each power rail and nothing is shorted.

Gonna start populating the front side after the little one goes to sleep. Should go faster than the back since it's mostly large ICs not hundreds of 0402s.

Show threadAndrew ZonenbergJul 15, 2023
Starting front side assembly. Paste print looks a lot nicer.
Show threadarclightJul 15, 2023
@azonenberg That looks like a ton of length-matched traces #wiggly
Show threadAndrew Zonenberg

@arclight Yep it's a dual port 36 bit SRAM. So 72 data lines plus address, control, clock, etc.

And 14 channels of Ethernet (56 diff pairs), two of SGMII (six diff pairs), three of QSGMII (another six diff pairs), XFI (two pairs). Lots of fast stuff here.

Jul 15, 2023 at 4:47amWeb
Show threadarclightJul 15, 2023
@azonenberg Board design is way above my head but I've watched enough repair & maker videos to start noticing details.