The #IEEE conference paper I was working on last year is finally published!

The UC Santa Cruz team did all of the actual silicon design work, while I did the post-silicon bringup, testing, and characterization.

"#SRAM Design with #OpenRAM in #SkyWater 130nm", 2023 IEEE International Symposium on Circuits and Systems (ISCAS)

https://ieeexplore.ieee.org/document/10181379

Also presented at OSDA 2023 https://www.youtube.com/watch?v=Wm8VV4Ba224

SRAM Design with OpenRAM in SkyWater 130nm

OpenRAM is an open-source framework for the development of memories with an initial focus on SRAMs. OpenRAM provides an application interface for netlist, layout, and characterization to create designs using either open-source or commercial verification and simulation tools. The first silicon in SkyWater <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{130}nm$</tex> has been successfully verified which includes a 32-bit 1-kilobyte dual-port SRAM macro. This paper presents the first macro design, test setup, test results, and enhancements on a subsequent tape-out.

Been following this blog and saw an article about an #OpenRAM #SNN implementation

@inproceedings{modaresi2023openspike,
title = {OpenSpike: An OpenRAM SNN Accelerator}
author = {Modaresi, Farhad and Guthaus, Matthew and Eshraghian, Jason K},
journal = {arXiv preprint arXiv:2302.01015},
year = {2023}
}

https://sedemos.blogspot.com/2023/02/paper-openspike-openram-snn-accelerator.html

Github: https://github.com/sfmth/OpenSpike

[paper] OpenSpike: An OpenRAM SNN Accelerator

Farhad Modaresi 1 , Matthew Guthaus 2 , and Jason K. Eshraghian 3 OpenSpike: An OpenRAM SNN Accelerator arXiv:2302.01015v1 [cs.AR] 2 Feb 20...