Dropping RISC-V support

UPDATE March 20 2025: The architecture is not being dropped for now after all. See the newer article for details. The next set of images will drop RISC-V support. The builder is currently still going but within the next few days it will stop, and the repositories will stay in place but frozen. Nothing will change in packaging (the build profile will remain, template support where present will remain, cross-toolchains will remain) but there will be no more updates to the repo for the foreseeable future.

Bell Pavillion / Revisited

Esoteric Survey is focused on mid-century furniture, architecture, and art- with an emphasis on California Design, Mexico, Japan, and the obscure.

Breaking Bad: How Compilers Break Constant-Time~Implementations

The implementations of most hardened cryptographic libraries use defensive programming techniques for side-channel resistance. These techniques are usually specified as guidelines to developers on specific code patterns to use or avoid. Examples include performing arithmetic operations to choose between two variables instead of executing a secret-dependent branch. However, such techniques are only meaningful if they persist across compilation. In this paper, we investigate how optimizations used by modern compilers break the protections introduced by defensive programming techniques. Specifically, how compilers break high-level constant-time implementations used to mitigate timing side-channel attacks. We run a large-scale experiment to see if such compiler-induced issues manifest in state-of-the-art cryptographic libraries. We develop a tool that can profile virtually any architecture, and we use it to run trace-based dynamic analysis on 44,604 different targets. Particularly, we focus on the most widely deployed cryptographic libraries, which aim to provide side-channel resistance. We are able to evaluate whether their claims hold across various CPU architectures, including x86-64, x86-i386, armv7, aarch64, RISC-V, and MIPS-32. Our large-scale study reveals that several compiler-induced secret-dependent operations occur within some of the most highly regarded hardened cryptographic libraries. To the best of our knowledge, such findings represent the first time these issues have been observed in the wild. One of the key takeaways of this paper is that the state-of-the-art defensive programming techniques employed for side-channel resistance are still inadequate, incomplete, and bound to fail when paired with the optimizations that compilers continuously introduce.

Add a new pattern to instruction selector to use EXTR supported by ARM64 · WebKit/WebKit@5533eb2

https://bugs.webkit.org/show_bug.cgi?id=227171 Patch by Yijia Huang <[email protected]> on 2021-07-01 Reviewed by Robin Morisset. This patch includes two modifications: 1. Introduce...

On the effectiveness of address-space randomization | Proceedings of the 11th ACM conference on Computer and communications security