Gabriele SveltoMay 24
Regarding the Raptor Lake bug I received a couple of messages from confused users that had read articles on Tomshardware and Neowin. They asked about erratas and microcode updates which puzzled me, because that was part of my early investigation into the bug and we know that the failure is not caused by a known errata and microcode updates cannot fix broken CPUs. So why did they ask? As it turns out it was slop. Both articles are 100% slop full of confusing and inaccurate claims.
Show thread🇺🇦 haxadecimal 🚫👑May 25
@stman @gabrielesvelto
Vertical microcode really is a lot like assembler, but the majority of microcoded systems (including microcoded microprocessors) use horizontal microcode, which usually takes fewer words of microcode, but much wider. Overall it's usually more total bits, but faster. Horizontal microcode almost always accomplishes more work in a single cycle.
Show threadRaffzahnMay 25

@brouhaha

I'd say it's the same in either case. Horizontal is just more capable by complying with more implied restrictions. In consequence one needs to think even more about each line.

@stman @gabrielesvelto

Show thread🇺🇦 haxadecimal 🚫👑May 25
@Raffzahn @stman @gabrielesvelto
The few vertically microcoded systems I'm familiar with take _many_ cycles to interpret one macroinstruction, and the cycle time is slow because the narrow, highly encoded micro word needs more levels of logic to decode into the hardware control signals.
Most horizontally microcoded machines take very few cycles per macroinstruction, unless the macroinstruction is quite complex.
Show threadRaffzahnMay 25

@stman @brouhaha @gabrielesvelto

Well, isn't it the same way as an Assembler is specific to a CPU? And boy there are CPU's out there at least as weird as some micro code engine...

Show threadRaffzahnMay 26

@stman @brouhaha

Not really, Of course there are may micro code architectures that use a full figured PC - as well as such with next-pointers or such coding (one or more) next addresses within their word.

Show thread★ STMAN ★ 🏳️‍🌈
@Raffzahn This is what I am usually implementing in my counter register state variable based FSM engines : A few outputs bits of the truth table are assigned & dedicated to "next state value" when needed to jump to state not being "current state +1" (conditionnaly or not), but I don't consider the current FSM state as a PC, because there is not "instruction fetch & decoding from memory", there is a truth table (That in most cases is implemented with a ROM). @brouhaha
May 26 at 1:32pmMastodon for iOS
Show threadRaffzahnMay 26

@stman @brouhaha

Today's people should way more often look at the very first machines, as they were developed by people who had no example, who really had to invent things from scratch. In today's schools one learns what is canon, which is ok. But beyond canon is a whole universe of awesome. Maybe not very useful in with modern base, but awesome to learn and dream about.

Anyway, have a good day.