I saw my favourite words.
"Schematics are available"

https://tumbleweed.nu/lm-3/schematics.html

LM-3 --- MIT CADR schematics

So somehow I've ended up on a bit of a rabbit hole.

Schematics for the MIT CADR LISP machine are available, and in fact there's already an FPGA implementation!

https://tumbleweed.nu/r/uhdl/doc/trunk/README.md

uhdl: Documentation

That said the target FPGAs are a bit... Unusual.

Either a pipistrello board (a xilinx Spartan 6) or an Arty S7 (Artix-7).

Maybe something that could be ported to a Tang FPGA?

@DosFox I have an Arty S7-25. It's a pretty standard Xilinx board. Though open source toolchain support still isn't there for XC7.
@WillFlux am I accidentally influencing a lot of people with FPGA Dev boards to try and run this 😅