dram🎀
Mosfet@mosfet hi that's fine by me, but i just want to make sure, do you understand what the bottom "large code model" is referring to?
@dramforever compiler compiling C to ARM (which happens to be one of the ISAs we teach), managing stack frames and calling an external function
@dramforever is it arm though
@mosfet it's risc-v assembly, specifically in the *large* *code model*, i.e. -mcmodel=large, where symbol references require referencing a literal pool nearby the instruction itself. this allows a single executable to way exceed 2G in total data and code size, and allows static linking while putting stuff all over the place in 64-bit address space. see https://github.com/riscv-non-isa/riscv-elf-psabi-doc/blob/master/riscv-elf.adoc#large-code-model
@mosfet among other things, arm assembly would have more three-letter mnemonics (add, sub, ldr, str) whereas risc-v has no such tendency. also risc-v has mips-style register alias names (s0, t0, etc) (but with no prefix (mips would have $t0 etc)) whereas arm registers are *mostly* just referred to by number (x0 through x31 ...)
@dramforever i have been enlightened. thank you so much