Ian at DangerousprototypesJun 5
DDR5 UDIMM and SODIMM modules on a prototype breakout board. Motherboards detect DDR5 via a "SPD hub" chip with an I2C/I3C interface. A 128 byte register configures the hub and temperature sensor. Standard tables in a 1024 byte EEPROM describe how to configure the RAM.
Mark KruegerJun 5
Show threadIan at Dangerousprototypes
Software (RGB control, esp.) can trash tables causing RAM failures. Some manuf. hide information in the unused EEPROM areas so only "official" RAM will be accepted. The Bus Pirate can be a fix for both these problems, check out our progress: https://forum.buspirate.com/t/ddr4-and-ddr5-parameter-table-reader/748/52?u=ian
DDR4 and DDR5 parameter table reader

Planks arrived! Let’s give it a try.

Bus Pirate
Jun 5 at 12:23pmMastodon for Android
Show threadMatt MetsJun 5
@buspirate Nice!!!