I now have the tools set up to develop for the RP2350, which means I can now start on the now Pico Garry.
This is the hardware I’m working with - a PGA2350 bodged to a USB socket.
I now have the tools set up to develop for the RP2350, which means I can now start on the now Pico Garry.
This is the hardware I’m working with - a PGA2350 bodged to a USB socket.
Up first are the six signals which run on fixed timings (FSIGS).
The previous version used a mix of PWMs and PIOs to output these, but PWMs have restrictions on pin allocations, and PIOs are in short supply.
This version has an array of data which can be sent to a PIO for outputting. A DMA can push the data to the PIO paced by the PIO. The PIO is just two instructions.
This will give tremendous flexibility to modify the basic timings for things such as faster RAM or a faster CPU.
One obvious way to speed up a CPC would be to only issue the READY (WAIT) signal when it's required - Ie. when accessing internal RAM (which is contested with video RAM accesses). I've tweaked my earlier pin orderings to put READY as the MSB in this data. Doing so means it could be driven in a different (and more flexible) way.
After wasting far too much time trying to configure a DMA properly I now have a 4MHz CPU clock on GPIO 0, with 50% duty cycle.
The meter doesn’t report a frequency on the 1MHz signals, but it does show a PWMed voltage. And it shows the 2MHz signals.
I’ll have to dig out the oscilloscope to test properly, but this should be the first stage complete.