Samee ZahurJan 21, 2023
Chris Siebenmann

TIL that the ppc64 (PowerPC 64-bit) architecture overloads 'or r1,r1,r1' (and the same using all r6 or r2) to change the (hardware) priority of your thread. This came up in a Go code generation issue, and Raymond Chen mentioned it in passing in 2018.

https://github.com/golang/go/issues/57741
https://devblogs.microsoft.com/oldnewthing/20180809-00/?p=99455
Also see the discussion in this PDF: https://student.ing-steen.se/unix/aix/redbooks/sg245768.pdf

runtime: performance regression due to bad instruction used in morestack_noctxt for ppc64 in CL 425396 · Issue #57741 · golang/go

What version of Go are you using (go version)? $ go version latest Does this issue reproduce with the latest release? yes What operating system and processor architecture are you using (go env)? go...

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Jan 19, 2023 at 5:17pmWeb
Show threadBorogoveJan 19, 2023
@cks WHAT.
Show threadBorogoveJan 19, 2023
@cks Does the Go compiler actually generate an ASCII asm file to pass to an assembler these days, or does it write an object file directly? It seems like a footgun for the assembler to accept `or r1,r1,r1` instead of inventing new mnemonics for the priority opcodes.
Show threadChris SiebenmannJan 19, 2023

@borogove Go writes the object file directly (and actually has its own internal assembler format anyway). I don't know if normal ppc64 assemblers accept the 'or' as written or error out saying 'if you really want to do this, you have to use our special instruction that assembles to the same bytes'.

(It certainly is an *interesting* way to add new instructions to your processor architecture, especially ones that may not be universally implemented since they only matter with hardware threads...)

Show threadSun Microdevil Pte LtdJan 19, 2023

@cks Very interesting!

Though, from some digging it seems like it was only started to be mentioned in Power ISA v2.03 (~POWER5 level, see §4.3.4 and §4.4.2 in the book 3S of the spec).
I wonder if it existed but was undocumented in earlier variants (given that Rayond Chen's PPC 600 blogpost has something similar)?

Show threadBen ZaninJan 19, 2023
@cks wat
Show threadruscurJan 21, 2023

@cks sure does, and there's more than that: https://elixir.bootlin.com/linux/latest/source/arch/powerpc/include/asm/ppc_asm.h#L147

special casing nops like this is very useful because you can compile them in without consequences if the program runs on older hardware.

ppc_asm.h - arch/powerpc/include/asm/ppc_asm.h - Linux source code (v6.1.7) - Bootlin

Elixir Cross Referencer - Explore source code in your browser - Particularly useful for the Linux kernel and other low-level projects in C/C++ (bootloaders, C libraries...)

Show threadSiguzaJan 21, 2023
@cks and here I thought you couldn't get worse than x86...
Show threadSaagar JhaJan 22, 2023
@cks @siguza Many architectures encode hints into nop space