I don't need any more projects.

Still, I got some parts for this crazy retro computer idea. A 20Mhz #Z80 paired with an #NES clone PPU (#UA6528) and a #SAA1099 8 channel sound chip.

Wish me luck 🤣.

Baby steps toward an emulator! It's using this Z80 emulator: https://github.com/superzazu/z80 and an incomplete 16550 emulator I've been writing.
GitHub - superzazu/z80: A z80 emulator written in C99.

A z80 emulator written in C99. Contribute to superzazu/z80 development by creating an account on GitHub.

GitHub
David DiPaola / fz-emu

[INCOMPLETE] Emulator for the FZ Z80+2C02+SAA1099 DYI retro computer abomination.

GitLab

#TIL the #NES PPU has some weird bugs.

The OAM (sprite) register interface has some strange behavior that makes the most reliable way to alter even a single value be to re-write the whole 256 byte state. The NES CPU conveniently has a purpose-built DMA for this but even that eats up about a quarter of v-blank time.

Another annoyance is there is no scanline counter interrupt.

I didn't realize how spoiled I was when I was doing #GameBoy development. 🤣 Pretty much all these annoyances are fixed on that platform.

I'm thinking now that I should look into one of the FPGA implementations of this chip and possibly tweak that to have the features I want. It would also be nice to integrate sound chip functionality so all the no-longer-in-production chips no longer have to be sourced. #FMSynthesis in particular would be nice to have.
@ddipaola it's generally recommended to DMA the whole 256 bytes every frame anyway just to keep the RAM from decaying

@revenant that makes sense.

I wonder why they implemented a control register as DRAM. Were they concerned about silicon area or something?

@ddipaola no idea but at least the DMA makes it less annoying

the real pain is not being able to DMA to any other part of PPU memory, there at least could have been a CPU halt pin on the cart connector or something to let mappers do it

@ddipaola meanwhile the SNES just has a DMA refresh circuit that just steals CPU cycles in the middle of every scanline which is a pain in the ass for its own reasons
@ddipaola oops i meant DRAM refresh, not DMA