NeufenaI don't suppose anyone out there knows anything about the Microsys SBC1190? It's an ancient #pc104 computer. Specifically I'm trying to find out how the special cable to switch between RUN and LOAD mode works. I'm guessing it just connects 2 pins on the serial header together but which pins?
Paula MaddoxHaving failed to get my first version of the C011 #PC104 #transputer adapter to work, I've gone for a simpler approach.
This has just the Inmos C011, 5MHz oscillator, decoding logic (CPLD/74*245) and of course some LEDs.
I've added more this time which I hope will give me of an idea when something is working or not.
I've also brought in all 20 bits of the ISA address bus to the CPLD (not that I think I'll need it but just in case).
I've also used DIP chips in case I need change the speed.
This has just the Inmos C011, 5MHz oscillator, decoding logic (CPLD/74*245) and of course some LEDs.
I've added more this time which I hope will give me of an idea when something is working or not.
I've also brought in all 20 bits of the ISA address bus to the CPLD (not that I think I'll need it but just in case).
I've also used DIP chips in case I need change the speed.
NotLadp and NotSys are two addresses (0x150 and 0x160) and are asserted when the address matches.
PCLK is the ISA bus clock (14.3MHz on my #PC104 PC).
My logic here is that this is a 3 stage ripply counter.
When either address is invalid, the riple counter is reset (.ar = asynchronous reset).
So when an address is valid the IOCHRDY signal will be LOW, i.e. force a wait state.
Wohooo!!!
My #Transputer #pc104 adapter lives!!!
Turns out the CUPL code has two pins inverted (active low) that should not be inverted.
My #Transputer #pc104 adapter lives!!!
Turns out the CUPL code has two pins inverted (active low) that should not be inverted.
Same sequence of events on my pc104 PC controller by QBasic, I don’t get a response from the TRAM for first read :(
So something isn’t right with the PC timing or the CPLD.
#transputer #pc104
So something isn’t right with the PC timing or the CPLD.
#transputer #pc104
I’m getting nowhere with my #PC104 computer, basically it’s too fast for my needs (celeron at 1Ghz with 1Gb ram).
Does anyone have something sub 300Mhz in pc104 they would like to swap?
Does anyone have something sub 300Mhz in pc104 they would like to swap?
#PC104 #Transputer woes...
It seems I can write a value to the TRAM (a T425 based one) but when I try to read it back I get rubbish :(
This is my writing 0xAA55AA55 to address 0x8000FF00 (this is a valid address)
but when I read it back, I just get 0x10101010
Well the #PC104 #Tranputet link board is assembled. And it sort of works.
I can write to the link controller (0x150 base address) and I can send and read data through the link ports for the transputer. But (you knew it was coming right?) when I try and read the status from the control logic I get the wrong values, even though I can reset the TRAM and set the analyse signal.
So I’m a bit baffled.
I can write to the link controller (0x150 base address) and I can send and read data through the link ports for the transputer. But (you knew it was coming right?) when I try and read the status from the control logic I get the wrong values, even though I can reset the TRAM and set the analyse signal.
So I’m a bit baffled.
Quick fit check of the big parts, everything fits.
I got lucky with one SMD part that if it had been slightly higher on the board it would have clashed with a part on the underside of the TRAM but I did have high 8pin headers just in case.
#Transputet #PC104
I got lucky with one SMD part that if it had been slightly higher on the board it would have clashed with a part on the underside of the TRAM but I did have high 8pin headers just in case.
#Transputet #PC104
