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sen@0x0ddc0ffee several of us working on similar ridiculous projects gather on Libera ##homebrewcpu should you ever be interested :) I started mine in 2012 and someday it’ll be done…
Huh, I first committed this code on December 20th, 2012 and never noticed the seemingly-obvious issue with it in the ~13 years since.
Toggling a signal every 40ns results in a 12.5MHz clock, not 25MHz. #homebrewcpu
There we go, a couple days of work later the reworked path for the control store address is done and everything still passes its tests.
Removed 12 chips and added 6 new ones in the process. A few nanoseconds improvement on the propagation time for this signal, half an amp improvement in current draw, and 6 fewer chips, plus the new design is a lot easier to understand for Future Sen and will accommodate the extra inputs I need to finish implementing exceptions. #homebrewcpu
Got stuck on a problem working on my LHC display, so switched gears for a bit to my CPU to clear my head. I'm working on implementing exceptions, but during my last session on that I realized the path that the control store address bits have to go through seemed to get getting excessively complicated, so I made a note to draw it out next time so I understand it better.
Did that, and it's definitely getting complicated and to be too many levels! Need to put some thought into simplifying this to make it easier to understand, improve propagation time (though it's fine the way it is in theory) and reduce the likelihood of problems, before I complexify it even further. #homebrewcpu
Thanks for the suggestions, all! I get this question in ##homebrewcpu on Libera from time to time and I know how I started learning but not what’s recommended in 2025, so figured I’d ask here.
Fork Level ZeroHomebrew CPU Instruction decode and instruction bus mockup in Digital. 1 byte. First nibble is intended to select the section of the processor. The second nibble is intended to select the subsection. For instance. Address ALU and Add two registers. Includes instruction register.
#homebrewcpu #diy #computers
#homebrewcpu #diy #computers
Alright, DMA works! And I found several bugs in other things along the way, wheee. Almost all fixed now, except when you load a byte into the high half of a 16-bit register (ECLair has the x86-ish thing of the 16-bit A register also being addressable as 8-bit AL and AH registers) it never sets the Z status bit properly, so branching based on if-zero doesn't work for high-half registers. That'll be next up to fix, then I need to figure out what's left! http://eclair.computer/dma-implemented/ #homebrewcpu
It's this kind of day today. Several bugs fixed that I accidentally found while working on DMA, and hopefully the last significant DMA bug will get resolved today and I can get a blog update up about it! #homebrewcpu
Basic DMA works! The test harness asserts DMA_REQ, a few tens of nanoseconds later the CPU pulls DMA_ACK high, the harness pokes some things directly into memory, deasserts DMA_REQ, and the CPU continues executing like nothing happened. #homebrewcpu